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[utils] Add minimal support for MIR inputs to update_llc_test_checks.py

Authored by rtereshin on Sep 18 2019, 4:44 PM.

Description

[utils] Add minimal support for MIR inputs to update_llc_test_checks.py

update_{llc,mir}_test_checks.py applicability is determined by the
output (assembly or MIR), not the input, which makes
update_llc_test_checks.py the right tool to generate tests that start at
MIR and stop at the final assembly.

This commit adds the minimal support for this path. Main limitation that
remains:

  • MIR has to have LLVM IR section, and the CHECK lines will be inserted into the LLVM IR functions that correspond to the MIR functions.

Running

../utils/update_llc_test_checks.py --llc-binary ./bin/llc

on a slightly modified ../test/CodeGen/X86/bad-tls-fold.mir

produces the following diff:

+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+# RUN: llc %s -o - | FileCheck %s

  • | target triple = "x86_64-unknown-linux-gnu"

@@ -6,17 +7,31 @@

@i = external thread_local global i32

define i32 @or() {

+ ; CHECK-LABEL: or:
+ ; CHECK: # %bb.0: # %entry
+ ; CHECK-NEXT: movq {{.*}}(%rip), %rax
+ ; CHECK-NEXT: orq $7, %rax
+ ; CHECK-NEXT: movq i@{{.*}}(%rip), %rcx
+ ; CHECK-NEXT: orq %rax, %rcx
+ ; CHECK-NEXT: movl %fs:(%rcx), %eax
+ ; CHECK-NEXT: retq

entry:
  ret i32 undef
}
  • define i32 @and() {

+ ; CHECK-LABEL: and:
+ ; CHECK: # %bb.0: # %entry
+ ; CHECK-NEXT: movq {{.*}}(%rip), %rax
+ ; CHECK-NEXT: orq $7, %rax
+ ; CHECK-NEXT: movq i@{{.*}}(%rip), %rcx
+ ; CHECK-NEXT: andq %rax, %rcx
+ ; CHECK-NEXT: movl %fs:(%rcx), %eax
+ ; CHECK-NEXT: retq

entry:
  ret i32 undef
}

...

(not applied)

llvm-svn: 372277

Details

Committed
rtereshinSep 18 2019, 4:44 PM
Parents
rG73778e9878fa: [utils] Amend update_llc_test_checks.py to non-llc tooling, NFC
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