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[AArch64] Add Cortex CPU subtarget features for instruction fusion.

Authored by SjoerdMeijer on Jan 25 2021, 12:48 AM.

Description

[AArch64] Add Cortex CPU subtarget features for instruction fusion.

This adds subtarget features for AES, literal, and compare and branch
instruction fusion for different Cortex CPUs.

Patch by: Cassie Jones.

Differential Revision: https://reviews.llvm.org/D94457

Details