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[AMDGPU] Fix DPP combiner

Authored by vpykhtin on Feb 8 2019, 3:59 AM.

Description

[AMDGPU] Fix DPP combiner

Differential revision: https://reviews.llvm.org/D55444

dpp move with uses and old reg initializer should be in the same BB.
bound_ctrl:0 is only considered when bank_mask and row_mask are fully enabled (0xF). Otherwise the old register value is checked for identity.
Added add, subrev, and, or instructions to the old folding function.
Kill flag is cleared for the src0 (DPP register) as it may be copied into more than one user.

The pass is still disabled by default.

llvm-svn: 353513

Details

Committed
vpykhtinFeb 8 2019, 3:59 AM
Differential Revision
D55444: AMDGPU: Fix DPP combiner
Parents
rG08dc50f2fb82: [DWARF] LLVM ERROR: Broken function found, while removing Debug Intrinsics.
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