[GlobalISel][AArch64] Add support for base register + offset register loads
Add support for folding G_GEPs into loads of the form
ldr reg, [base, off]
when possible. This can save an add before the load. Currently, this is only
supported for loads of 64 bits into 64 bit registers.
Add a new addressing mode function, selectAddrModeRegisterOffset which
performs this folding when it is profitable.
Also add a test for addressing modes for G_LOAD.
Differential Revision: https://reviews.llvm.org/D64944