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[AArch64][BFloat] add BFloat instruction support for AArch64

Authored by stuij on May 27 2020, 7:27 AM.

Description

[AArch64][BFloat] add BFloat instruction support for AArch64

Summary:
Add support for lowering various BFloat related SelDAG nodes:

  • load/store (ldrh/strh)
  • concat
  • dup/duplane
  • bitconvert/bitcast
  • insert_subvector/insert_subreg

This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

Reviewers: ab, t.p.northover, john.brawn, fpetrogalli, sdesmalen, LukeGeeson

Reviewed By: fpetrogalli

Subscribers: LukeGeeson, pbarrio, kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79712

Details

Committed
stuijMay 27 2020, 7:36 AM
Reviewer
fpetrogalli
Differential Revision
D79712: [AArch64][BFloat] add BFloat instruction support for AArch64
Parents
rG4408eeed0ff1: tsan: fix false positives in AcquireGlobal
Branches
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Tags
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