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[X86][BdVer2] Polish LEA instruction scheduling info

Authored by lebedev.ri on Jan 26 2020, 9:33 AM.

Description

[X86][BdVer2] Polish LEA instruction scheduling info

Based on exhaustive llvm-exegesis measurements.
There may still be some imperfections for LEA16r/LEA32r.

Much like was observed in D68646, i'm also measuring some outliers
with some specific registers.

Details

Committed
lebedev.riJan 26 2020, 11:17 AM
Parents
rG31019dfdf547: [NFC][MCA] Re-autogenerate all check lines in all X86 MCA tests
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