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[AArch64] Fix vector vuqadd intrinsics operands

Authored by dnsampaio on Jul 10 2019, 2:58 AM.

Description

[AArch64] Fix vector vuqadd intrinsics operands

Summary:
Change the vuqadd vector instrinsics to have the second argument as unsigned values, not signed,
accordingly to https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics

Reviewers: LukeCheeseman, ostannard

Reviewed By: ostannard

Subscribers: javed.absar, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64211

llvm-svn: 365609

Details

Committed
dnsampaioJul 10 2019, 2:58 AM
Reviewer
ostannard
Differential Revision
D64211: [AArch64] Fix vector vuqadd intrinsics operands
Parents
rGa8ce16101080: [NFC][AArch64] Fix vector vsqadd intrinsics operands
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