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[RISCV] Add SiFive core S51

Authored by apivovarov on Aug 30 2021, 11:23 PM.

Description

[RISCV] Add SiFive core S51

Add SiFive core s51 as rv64imac RocketModel

Reviewed-By: MaskRay, evandro
Differential Revision: https://reviews.llvm.org/D108886

Details

Committed
apivovarovSep 2 2021, 6:45 PM
Differential Revision
D108886: Add RISC-V sifive-s51 cpu
Parents
rGa42380ce8379: [OMPIRBuilder] Add ordered directive to OMPBuilder
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