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[RISCV] Implement codegen for cmpxchg on RV32IA

Authored by asb on Nov 29 2018, 12:43 PM.

Description

[RISCV] Implement codegen for cmpxchg on RV32IA

Utilise a similar ('late') lowering strategy to D47882. The changes to
AtomicExpandPass allow this strategy to be utilised by other targets which
implement shouldExpandAtomicCmpXchgInIR.

All cmpxchg are lowered as 'strong' currently and failure ordering is ignored.
This is conservative but correct.

Differential Revision: https://reviews.llvm.org/D48131

llvm-svn: 347914

Details

Committed
asbNov 29 2018, 12:43 PM
Differential Revision
D48131: [RISCV] Implement codegen for cmpxchg on RV32IA
Parents
rG7eb1c2864fb3: Adding .vscode to svn:ignore
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