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[AArch64] match fcvtl2 with bitcasted extract

Authored by spatel on Dec 18 2019, 5:47 AM.

Description

[AArch64] match fcvtl2 with bitcasted extract

This should eliminate a regression seen in D63815.

If we are FP extending the high half extract of a vector,
we should be able to peek through a bitcast sitting
between the extract and extend.

This replaces tablegen patterns with a more general
DAG to DAG override, so we can handle any casted type.

Differential Revision: https://reviews.llvm.org/D71515

Details

Committed
spatelDec 18 2019, 5:47 AM
Differential Revision
D71515: [AArch64] match fcvtl2 with bitcasted extract
Parents
rGc7492fbd4e85: [InstCombine] add tests for copysign; NFC
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