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[X86] Add test cases to show missed opportunities to remove AND mask from…

Authored by craig.topper on Feb 20 2019, 1:35 PM.

Description

[X86] Add test cases to show missed opportunities to remove AND mask from BTC/BTS/BTR instructions when LHS of AND has known zeros.

We can currently remove the mask if the immediate has all ones in the LSBs, but if the LHS of the AND is known zero, then the immediate might have had bits removed.

A similar issue also occurs with shifts and rotates. I'm preparing a common fix for all of them.

llvm-svn: 354520

Details

Committed
craig.topperFeb 20 2019, 1:35 PM
Parents
rG198cc305e985: [CGP] match a special-case of unsigned subtract overflow
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