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AMDGPU: Fix using unencodable instructions in tests
54a8a8d5095f
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Authored by arsenm on Jun 4 2020, 12:31 PM.

Description

AMDGPU: Fix using unencodable instructions in tests

There are a number of MIR tests using instructions on subtargets where
they don't really exist. These are some of the easy cases that don't
require splitting up test functions.

Details

Committed
arsenmJun 4 2020, 1:50 PM
Parents
rGfe0d5121fa97: AMDGPU/GlobalISel: Fix making LDS FP atomics legal on SI/CI
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Changes (13)

PathSize
llvm/
test/
CodeGen/
AMDGPU/

rG54a8a8d5095f

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llvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll

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llvm/test/CodeGen/AMDGPU/fold-sgpr-multi-imm.mir

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llvm/test/CodeGen/AMDGPU/i1_copy_phi_with_phi_incoming_value.mir

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llvm/test/CodeGen/AMDGPU/memory_clause.mir

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llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir

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llvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir

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llvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir

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llvm/test/CodeGen/AMDGPU/shrink-carry.mir

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llvm/test/CodeGen/AMDGPU/smrd-fold-offset.mir

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llvm/test/CodeGen/AMDGPU/vmem-to-salu-hazard.mir

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llvm/test/CodeGen/AMDGPU/waitcnt-loop-single-basic-block.mir

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llvm/test/CodeGen/AMDGPU/waitcnt-preexisting.mir

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llvm/test/CodeGen/AMDGPU/wqm.mir

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