HomePhabricator

[RISCV] Allow access to FP CSRs without F extension

Authored by apazos on Mar 8 2019, 3:01 PM.

Description

[RISCV] Allow access to FP CSRs without F extension

Summary:
Floating-point CSRs should be accessible even when F extension is not enabled.
But pseudo instructions that access floating point CSRs still require the F extension.
GNU tools already implement this behavior. RISC-V spec is pending update to reflect
this behavior and to extend it to pseudo instructions that access floating point CSRs.

Reviewers: asb

Reviewed By: asb

Subscribers: asb, rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, llvm-commits

Differential Revision: https://reviews.llvm.org/D58932

llvm-svn: 355753