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[X86] When using AND+PACKUS in lowerV16I8Shuffle, generate the build vector…

Authored by craig.topper on Jul 22 2019, 12:58 PM.

Description

[X86] When using AND+PACKUS in lowerV16I8Shuffle, generate the build vector directly in v16i8 with the correct 0x00 or 0xFF elements rather than using another VT and bitcasting it.

The build_vector will become a constant pool load. By using the
desired type initially, it ensures we don't generate a bitcast
of the constant pool load which will need to be folded with
the load.

While experimenting with another patch, I noticed that when the
load type and the constant pool type don't match, then
SimplifyDemandedBits can't handle it. While we should probably
fix that, this was a simple way to fix the issue I saw.

llvm-svn: 366732

Details

Committed
craig.topperJul 22 2019, 12:58 PM
Parents
rG8dd563ef4b48: [NFC][PowerPC]Change ADDIStocHA to ADDIStocHA8 to follow 64-bit naming…
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