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[AArch64]: BFloat Load/Store Intrinsics&CodeGen

Authored by LukeGeeson on Jun 9 2020, 6:51 AM.

Description

[AArch64]: BFloat Load/Store Intrinsics&CodeGen

This patch upstreams support for ld / st variants of BFloat intrinsics
in from __bf16 to AArch64. This includes IR intrinsics. Unittests are
provided as needed.

This patch is part of a series implementing the Bfloat16 extension of
the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties are specified in the Arm
Architecture
Reference Manual:

https://developer.arm.com/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile

The following people contributed to this patch:

  • Luke Geeson
  • Momchil Velikov
  • Luke Cheeseman

Reviewers: fpetrogalli, SjoerdMeijer, sdesmalen, t.p.northover, stuij

Reviewed By: stuij

Subscribers: arsenm, pratlucas, simon_tatham, labrinea, kristof.beyls,
hiraditya, danielkiss, cfe-commits, llvm-commits, pbarrio, stuij

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D80716

Change-Id: I22e1dca2a8a9ec25d1e4f4b200cb50ea493d2575

Details

Committed
LukeGeesonJun 16 2020, 7:23 AM
Reviewer
stuij
Differential Revision
D80716: [AArch64]: BFloat Load/Store Intrinsics&CodeGen
Parents
rGe830fa260da9: [clang][amdgpu] Prefer not using `fp16` conversion intrinsics.
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