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AArch64: enforce even/odd register pairs for CASP instructions.

Authored by t.p.northover on Feb 6 2019, 7:26 AM.

Description

AArch64: enforce even/odd register pairs for CASP instructions.

ARMv8.1a CASP instructions need the first of the pair to be an even register
(otherwise the encoding is unallocated). We enforced this during assembly, but
not CodeGen before.

llvm-svn: 353308

Details

Committed
t.p.northoverFeb 6 2019, 7:26 AM
Parents
rGe5c37958f901: [InlineAsm][X86] Add backend support for X86 flag output parameters.
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