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[AArch64] Add v8.5-a Memory Tagging STZGM instruction

Authored by DavidSpickett on Apr 1 2019, 7:56 AM.

Description

[AArch64] Add v8.5-a Memory Tagging STZGM instruction

This instruction writes a block of allocation tags
and stores zero to the associated data locations.

It differs from STGM by 1 bit and has the same
arguments.

The specification can be found here:
https://developer.arm.com/docs/ddi0596/c

Differential Revision: https://reviews.llvm.org/D60065

llvm-svn: 357397

Details