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[ARM] Optimise ASRL/LSRL to smaller shifts using demand bits.

Authored by dmgreen on Mar 13 2020, 2:04 AM.

Description

[ARM] Optimise ASRL/LSRL to smaller shifts using demand bits.

The ASRL/LSRL long shifts are generated from 64bit shifts. Once we have
them, it might turn out that enough of the 64bit result was not required
that we can use a smaller shift to perform the same result. As the
smaller shift can in general be folded in more way, such as into add
instructions in one of the test cases here, we can use the demand bit
analysis to prefer the smaller shifts where we can.

Differential Revision: https://reviews.llvm.org/D75371

Details

Committed
dmgreenMar 13 2020, 3:09 AM
Differential Revision
D75371: [ARM] Optimise ASRL/LSRL to smaller shifts using demand bits.
Parents
rG5c68043b9fa7: [gn build] (manually) port ce79c4246
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