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AMDGPU: Don't enable all lanes with non-CSR VGPR spills

Authored by arsenm on May 28 2019, 9:46 AM.

Description

AMDGPU: Don't enable all lanes with non-CSR VGPR spills

If the only VGPRs used for SGPR spilling were not CSRs, this was
enabling all laness and immediately restoring exec. This is the usual
situation in leaf functions.

llvm-svn: 361848

Details

Committed
arsenmMay 28 2019, 9:46 AM
Parents
rG7166843f1e10: [AMDGPU] Fix the mis-handling of `vreg_1` copied from scalar register.
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