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[AMDGPU][MC] Corrected parsing of registers

Authored by dp on Apr 17 2019, 7:44 AM.

Description

[AMDGPU][MC] Corrected parsing of registers

See bug 41280: https://bugs.llvm.org/show_bug.cgi?id=41280

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D60621

llvm-svn: 358581

Details

Committed
dpApr 17 2019, 7:44 AM
Differential Revision
D60621: [AMDGPU][MC] Corrected parsing of registers
Parents
rG59e8bd3093dc: [AMDGPU] Flag new raw/struct atomic ops as source of divergence
Branches
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Tags
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