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[X86] Fix SLM v2i64 ADD/Sub/CMPEQ instruction schedules

Authored by RKSimon on Wed, Nov 6, 11:07 AM.

Description

[X86] Fix SLM v2i64 ADD/Sub/CMPEQ instruction schedules

Noticed while fixing the reduction costs for D59710 - the SLM model doesn't account for the poor throughput of v2i64 ops.

Numbers taken from Intel AOM (+ checked against Agner)

Details

Committed
RKSimonWed, Nov 6, 11:08 AM
Parents
rGad70d5f39ae9: [X86] Fix SLM v2f64 ADD/MUL + FP BLEND/HADD instruction schedules
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