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[llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more…

Authored by oontvoo on Jun 17 2020, 7:45 PM.

Description

[llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more precise measurements.

Starting with Skylake, the LBR contains the precise number of cycles between the two
consecutive branches.
Making use of this will hopefully make the measurements more precise than the
existing methods of using RDTSC.

        Differential Revision: https://reviews.llvm.org/D77422

Details

Committed
oontvooJul 16 2020, 9:12 AM
Parents
rG2e046be90e51: [flang] Adopt NoRegionArguments (WhereOp) and ParentOneOf (ResultOp) traits
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