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[RISCV][Clang] Add RVV AMO builtins

Authored by arcbbb on Apr 21 2021, 1:48 AM.

Description

[RISCV][Clang] Add RVV AMO builtins

Add vamo[swap/add/xor/and/or/min/max/minu/maxu] builtins.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D100448

Details

Committed
arcbbbApr 21 2021, 1:48 AM
Reviewer
khchen
Differential Revision
D100448: [RISCV][Clang] Add RVV AMO builtins
Parents
rG57ca65e21e9a: [AArch64] Add instruction costs for FP_TO_UINT and FP_TO_SINT with half types
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