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[AArch64][GlobalISel] Fix TBNZ/TBZ opcode selection

Authored by paquette on Jan 29 2020, 12:50 PM.

Description

[AArch64][GlobalISel] Fix TBNZ/TBZ opcode selection

When the bit is <= 32, we have to use the W register variant for TB(N)Z.

This is because of the way the instruction is encoded.

Differential Revision: https://reviews.llvm.org/D73660

Details

Committed
paquetteJan 29 2020, 1:11 PM
Differential Revision
D73660: [AArch64][GlobalISel] Fix TBNZ/TBZ opcode selection
Parents
rG363289b542d1: [gn build] Port 24962ced814
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