[asan] Add support for Myriad RTEMS memory map


[asan] Add support for Myriad RTEMS memory map

The Myriad RTEMS memory system has a few unique aspects that
require support in the ASan run-time.

  • A limited amount of memory (currently 512M).
  • No virtual memory, no memory protection.
  • DRAM starts at address 0x80000000. Other parts of memory may be used for MMIO, etc.
  • The second highest address bit is the "cache" bit, and 0x80000000 and 0x84000000 alias to the same memory.

To support the above, we make the following changes:

  • Use a ShadowScale of 5, to reduce shadow memory overhead.
  • Adjust some existing macros to remove assumption that the lowest memory address is 0.
  • add a RawAddr macro that on Myriad strips the cache bit from the input address, before using the address for shadow memory (for other archs this does nothing).
  • We must check that an address is in DRAM range before using it to index into shadow memory.

Differential Revision: https://reviews.llvm.org/D46456


waltlMay 17 2018, 9:09 PM
Differential Revision
D46456: [asan] Add support for Myriad RTEMS memory map