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vinayaka-polymage (Vinayaka Bandishti)
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User Since
Feb 18 2021, 8:51 PM (65 w, 3 d)

Recent Activity

Jan 12 2022

vinayaka-polymage added a reviewer for D117178: [CAPI] omp->llvmir translation in execution engine: lhames.
Jan 12 2022, 6:23 PM · Restricted Project
vinayaka-polymage requested review of D117178: [CAPI] omp->llvmir translation in execution engine.
Jan 12 2022, 6:18 PM · Restricted Project

Nov 29 2021

vinayaka-polymage accepted D114662: [MLIR] Fix affine.for unroll for multi-result upper bound maps.

Looks good, minor request to complicate the test case, thanks!

Nov 29 2021, 9:35 AM · Restricted Project

Oct 7 2021

vinayaka-polymage added a comment to D111375: [MLIR] Fix affine loop unroll for zero trip count loops.

Simple clarification.

Oct 7 2021, 10:07 PM · Restricted Project

Sep 29 2021

vinayaka-polymage added inline comments to D104614: [MLIR] Generalize detecting mods during slice computing.
Sep 29 2021, 2:30 AM · Restricted Project

Aug 25 2021

vinayaka-polymage added a comment to D106662: [MLIR] FlatAffineConstraints: Refactored computation of explicit representation for identifiers.

Hi @arjunp @Groverkss , sorry - I am currently unavailable until the end of the week, and will not be able to review this. I will check this during the weekend if it is still open.

Aug 25 2021, 4:26 AM · Restricted Project

Aug 2 2021

vinayaka-polymage accepted D107214: [MLIR] FlatAffineConstraints: Fixed bug where some divisions were not being detected.

Looks good now, thanks for addressing the comments.

Aug 2 2021, 4:11 AM · Restricted Project
vinayaka-polymage requested changes to D107214: [MLIR] FlatAffineConstraints: Fixed bug where some divisions were not being detected.
Aug 2 2021, 4:07 AM · Restricted Project
vinayaka-polymage added a comment to D107214: [MLIR] FlatAffineConstraints: Fixed bug where some divisions were not being detected.

Thanks for the clarification, will take another look in some time.

Aug 2 2021, 1:48 AM · Restricted Project

Aug 1 2021

vinayaka-polymage requested changes to D107214: [MLIR] FlatAffineConstraints: Fixed bug where some divisions were not being detected.

Thanks for this enhancement!

Aug 1 2021, 10:45 PM · Restricted Project

Jul 25 2021

vinayaka-polymage accepted D105963: [mlir][affine-loop-fusion] Fix a bug that AffineIfOp prevents fusion of the other loops.

Thanks @tungld ! It looks good to me.

Jul 25 2021, 8:49 PM · Restricted Project

Jul 23 2021

vinayaka-polymage added a comment to D106609: [mlir] Set insertion point of vector constant to the top of the vectorized loop body.

Thank you, changes look good. Can you please add a brief summary for the fix (unless you think it is generally obvious) ?

Jul 23 2021, 4:50 AM · Restricted Project

Jul 22 2021

vinayaka-polymage accepted D105963: [mlir][affine-loop-fusion] Fix a bug that AffineIfOp prevents fusion of the other loops.

Thanks for addressing all the comments. Changes look good!

Jul 22 2021, 9:44 AM · Restricted Project

Jul 21 2021

vinayaka-polymage requested changes to D105963: [mlir][affine-loop-fusion] Fix a bug that AffineIfOp prevents fusion of the other loops.

Thanks for this, occurrence an AffineIfOp doesn't need to prevent fusion happening elsewhere, and canFuseLoops already checks for AffineIfOps.

Jul 21 2021, 11:56 PM · Restricted Project

Jul 15 2021

vinayaka-polymage added a comment to D106123: [MLIR] Add folder for zero trip count affine.for.

Looks good, minor documentation nits.

Jul 15 2021, 9:41 PM · Restricted Project

Jul 14 2021

vinayaka-polymage accepted D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .

Thanks for addressing all the comments, sorry once again for taking so long to review. As some ops were moving out from one for op to its parent, I wanted to closely review the scenarios.

Jul 14 2021, 10:50 AM · Restricted Project

Jul 13 2021

vinayaka-polymage added a comment to D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .

Thanks for addressing all the comments, I will make a final pass on it in a day.

Jul 13 2021, 1:39 AM · Restricted Project

Jul 12 2021

vinayaka-polymage added a comment to D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .

Suggestion

Jul 12 2021, 10:10 PM · Restricted Project
vinayaka-polymage added inline comments to D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .
Jul 12 2021, 7:06 PM · Restricted Project

Jul 11 2021

vinayaka-polymage added a comment to D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .

Changes look good now, minor clarification request.

Jul 11 2021, 8:08 PM · Restricted Project

Jul 5 2021

vinayaka-polymage accepted D105171: [MLIR] Fix memref get constant bound size and shape method.

It seems correct to me, that the constant bound is non-negative always, on principle. Was this bound being negative creating any problem in some cases ? If yes, it might be useful to mention that in comments.

Jul 5 2021, 9:32 AM · Restricted Project

Jun 28 2021

vinayaka-polymage added a comment to D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .

Thanks for addressing comments, sorry for getting back on this so late.

Jun 28 2021, 5:41 AM · Restricted Project

Jun 22 2021

vinayaka-polymage added a comment to D104614: [MLIR] Generalize detecting mods during slice computing.

We can wait till tomorrow morning IST for any new comments.

Jun 22 2021, 9:17 AM · Restricted Project
vinayaka-polymage requested changes to D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .

I think, in summary, attempt here is to fuse two loops that are reducing under sibling fusion, which is good. I think, the conditions presented in this patch need to be stricter to make it work. Here is a counter example (output results in incorrect code):

func @reduce_add_f32_f32(%arg0: memref<64x64xf32, 1>, %arg1: memref<1x64xf32, 1>, %arg2: memref<1x64xf32, 1>) {
  %cst_0 = constant 0.000000e+00 : f32
  %cst_1 = constant 1.000000e+00 : f32
  %0 = memref.alloca() : memref<f32, 1>
  %1 = memref.alloca() : memref<f32, 1>
  affine.for %arg3 = 0 to 1 {
    affine.for %arg4 = 0 to 64 {
      %accum = affine.for %arg5 = 0 to 64 iter_args (%prevAccum = %cst_0) -> f32 {
        %4 = affine.load %arg0[%arg5, %arg4] : memref<64x64xf32, 1>
        %5 = addf %prevAccum, %4 : f32
        affine.yield %5 : f32
      }
      %accum_dbl = addf %accum, %accum : f32
      affine.store %accum_dbl, %arg1[%arg3, %arg4] : memref<1x64xf32, 1>
    }
  }
  affine.for %arg3 = 0 to 1 {
    affine.for %arg4 = 0 to 64 {
      %accum = affine.for %arg5 = 0 to 32 iter_args (%prevAccum = %cst_1) -> f32 { // modified the test case on this line 64 => 32
        %4 = affine.load %arg0[%arg5, %arg4] : memref<64x64xf32, 1>
        %5 = mulf %prevAccum, %4 : f32
        affine.yield %5 : f32
      }
      %accum_sqr = mulf %accum, %accum : f32
      affine.store %accum_sqr, %arg2[%arg3, %arg4] : memref<1x64xf32, 1>
    }
  }
  return
}
Jun 22 2021, 3:42 AM · Restricted Project

Jun 21 2021

vinayaka-polymage requested review of D104688: [NFC][PDL] Fix documentation typo, redundant test.
Jun 21 2021, 10:49 PM · Restricted Project

Jun 20 2021

vinayaka-polymage requested review of D104614: [MLIR] Generalize detecting mods during slice computing.
Jun 20 2021, 8:53 PM · Restricted Project

Jun 16 2021

vinayaka-polymage requested changes to D104249: [mlir] Enable cleanup of single iteration reduction loops being sibling-fused maximally .

Thanks for this, I am posting comments based on a very superficial glance, I will go through it in more detail.

  1. I have posted some minor inline comments.
  2. It would be good to wrap the commit msg to the standard wrap width.
Jun 16 2021, 9:17 AM · Restricted Project
vinayaka-polymage accepted D104174: [MLIR] Make store to load fwd condition less conservative.

Looks good, saves PostDominanceInfo calculation.
Minor: comments at some places need to change to does not dominate any ... at a couple of places as pointed out by @ayzhuang .

Jun 16 2021, 7:59 AM · Restricted Project

Jun 11 2021

vinayaka-polymage added a comment to D104174: [MLIR] Make store to load fwd condition less conservative.

Looks great. Minor comments -

Jun 11 2021, 11:44 PM · Restricted Project

Jun 3 2021

vinayaka-polymage accepted D103294: [mlir] Remove redundant loads.

Very helpful! Looks great, thanks.

Jun 3 2021, 12:39 PM · Restricted Project

May 24 2021

vinayaka-polymage added a comment to D102984: [Affine][LICM] Mark users of `iter_args` variant.

Incorporated all the suggestions, thanks @bondhugula !

May 24 2021, 3:40 AM · Restricted Project
vinayaka-polymage updated the diff for D102984: [Affine][LICM] Mark users of `iter_args` variant.

Thanks for the suggestions for compactness, all of them worked well.

May 24 2021, 3:37 AM · Restricted Project

May 23 2021

vinayaka-polymage requested review of D102984: [Affine][LICM] Mark users of `iter_args` variant.
May 23 2021, 5:45 AM · Restricted Project

May 17 2021

vinayaka-polymage added a comment to D102604: [MLIR][Affine] Privatize certain escaping memrefs.

Addressed typos.

May 17 2021, 4:49 AM · Restricted Project
vinayaka-polymage updated the diff for D102604: [MLIR][Affine] Privatize certain escaping memrefs.

Thanks for the quick review, corrected the typos, and added additional
comments for clarification.

May 17 2021, 4:11 AM · Restricted Project
vinayaka-polymage requested review of D102604: [MLIR][Affine] Privatize certain escaping memrefs.
May 17 2021, 3:16 AM · Restricted Project

May 8 2021

vinayaka-polymage updated the diff for D102104: [MLIR] Add memref dialect dependency for affine fusion pass.

Adding why the issue was not discovered till now

May 8 2021, 7:06 AM · Restricted Project
vinayaka-polymage updated the diff for D102104: [MLIR] Add memref dialect dependency for affine fusion pass.

Better commit summary and message

May 8 2021, 7:01 AM · Restricted Project
vinayaka-polymage added a reviewer for D102104: [MLIR] Add memref dialect dependency for affine fusion pass: ayzhuang.
May 8 2021, 6:28 AM · Restricted Project
vinayaka-polymage requested review of D102104: [MLIR] Add memref dialect dependency for affine fusion pass.
May 8 2021, 6:22 AM · Restricted Project

May 5 2021

vinayaka-polymage accepted D101794: [mlir] Update dstNode after DenseMap insertion in loop fusion pass..

Looks great, thanks for fixing this hard and non-trivial bug !

May 5 2021, 10:06 AM · Restricted Project

Apr 12 2021

vinayaka-polymage accepted D99761: [mlir] Prevent operations with users from being hoisted.

Please change the commit title to a more relevant one, I am approving this.

Apr 12 2021, 9:52 AM · Restricted Project
vinayaka-polymage added a comment to D99761: [mlir] Prevent operations with users from being hoisted.

@sumesh13 Thanks for addressing all the comments, the change looks good now. Can you please check these last two comments before I approve this ?

Apr 12 2021, 9:25 AM · Restricted Project

Apr 11 2021

vinayaka-polymage requested changes to D99761: [mlir] Prevent operations with users from being hoisted.

@sumesh13 This new generic fix looks good, it handles more cases that were previously not handled. Thanks for this. I have added some comments related to code organization, please check them. Logic looks good to me.

Apr 11 2021, 10:04 PM · Restricted Project

Apr 7 2021

vinayaka-polymage added a comment to D99761: [mlir] Prevent operations with users from being hoisted.

Minor suggestion.

Apr 7 2021, 11:41 PM · Restricted Project
vinayaka-polymage requested changes to D99761: [mlir] Prevent operations with users from being hoisted.

Thank you for bringing up this issue in LICM, it is an important one. I have a few comments on the fix:

  1. Inherent issue is definedOps ( going to be renamed to opsWithUsers) is being populated only under some conditions, and does not actually do the job of collecting all ops that define an SSA value in that block.
  2. Even after this fix, only AffineForOps will be added to the list, but there are other cases like AffineDma... ops, AffineIfOps that are actually NOT code invariant etc. which will still cause similar problems.
Apr 7 2021, 11:01 PM · Restricted Project

Mar 31 2021

vinayaka-polymage added a comment to D98239: [MLIR][Affine] Add utility to check if the slice is valid.

Recent suggestions incorporated. I have asked for clarification on one comment.

Mar 31 2021, 2:51 AM · Restricted Project
vinayaka-polymage updated the diff for D98239: [MLIR][Affine] Add utility to check if the slice is valid.

Addressing minor comments.

Mar 31 2021, 2:45 AM · Restricted Project
vinayaka-polymage updated the diff for D98239: [MLIR][Affine] Add utility to check if the slice is valid.

Addressing recent comments, minor.

Mar 31 2021, 2:25 AM · Restricted Project

Mar 27 2021

vinayaka-polymage added a comment to D98239: [MLIR][Affine] Add utility to check if the slice is valid.

I have addressed the remaining comments:

  1. Instead of not printing the slice at all if it is incorrect, this change prints them but with a remark : "Incorrect slice" during testing.
  2. Fast check is being done, and is reusing the bounds checking utility function isSliceMaximalFastCheck. I have verified that with today's test file loop-fusion.mlir, of 156 calls to isSliceValid, 107 calls are returned after the this fast check itself.
Mar 27 2021, 3:43 AM · Restricted Project
vinayaka-polymage updated the diff for D98239: [MLIR][Affine] Add utility to check if the slice is valid.

Added back the slice computation remarks in tests, marked them incorrect slices.
Added a fast check, reused the utility - isSliceMaximalFastCheck.

Mar 27 2021, 3:32 AM · Restricted Project

Mar 11 2021

vinayaka-polymage added inline comments to D98239: [MLIR][Affine] Add utility to check if the slice is valid.
Mar 11 2021, 12:26 PM · Restricted Project
vinayaka-polymage added a comment to D98239: [MLIR][Affine] Add utility to check if the slice is valid.

Thanks for the review and suggestions !! I have completed the easy ones, and I will continue exploring the pending ones.

Mar 11 2021, 1:31 AM · Restricted Project
vinayaka-polymage updated the diff for D98239: [MLIR][Affine] Add utility to check if the slice is valid.

Addressing easy comments and suggestions, some important ones
still pending.

Mar 11 2021, 1:20 AM · Restricted Project

Mar 9 2021

vinayaka-polymage added a comment to D98239: [MLIR][Affine] Add utility to check if the slice is valid.

If this change/approach is acceptable, we can also change ComputationSliceState::isMaximal() to use the set difference the other way (source - slice), reusing these computations.

Mar 9 2021, 12:43 AM · Restricted Project
vinayaka-polymage requested review of D98239: [MLIR][Affine] Add utility to check if the slice is valid.
Mar 9 2021, 12:39 AM · Restricted Project

Feb 25 2021

vinayaka-polymage added inline comments to D97252: [MLIR][affine] Certain Call Ops to prevent fusion.
Feb 25 2021, 10:12 PM · Restricted Project
vinayaka-polymage updated the diff for D97252: [MLIR][affine] Certain Call Ops to prevent fusion.

Addressing the getOperandTypes comment

Feb 25 2021, 10:11 PM · Restricted Project
vinayaka-polymage added a comment to D97252: [MLIR][affine] Certain Call Ops to prevent fusion.

Thanks a lot for the insights @bondhugula and @dcaballe ! No more changes needed for this patch then.

Feb 25 2021, 3:31 AM · Restricted Project

Feb 24 2021

vinayaka-polymage accepted D97347: [mlir] Check 'iter_args' in 'isLoopParallel' utility.

Looks good, thanks !

Feb 24 2021, 9:36 AM · Restricted Project

Feb 22 2021

vinayaka-polymage added inline comments to D97252: [MLIR][affine] Certain Call Ops to prevent fusion.
Feb 22 2021, 11:57 PM · Restricted Project
vinayaka-polymage added a comment to D97032: [MLIR][affine] Prevent fusion when ops with memory effect free are present between producer and consumer.

Suggested additional checks and test-cases submitted at https://reviews.llvm.org/D97252

Feb 22 2021, 9:16 PM · Restricted Project
vinayaka-polymage requested review of D97252: [MLIR][affine] Certain Call Ops to prevent fusion.
Feb 22 2021, 9:14 PM · Restricted Project
vinayaka-polymage added inline comments to D97032: [MLIR][affine] Prevent fusion when ops with memory effect free are present between producer and consumer.
Feb 22 2021, 5:47 AM · Restricted Project
vinayaka-polymage updated the diff for D97032: [MLIR][affine] Prevent fusion when ops with memory effect free are present between producer and consumer.

Test case fix.

Feb 22 2021, 5:35 AM · Restricted Project

Feb 18 2021

vinayaka-polymage requested review of D97032: [MLIR][affine] Prevent fusion when ops with memory effect free are present between producer and consumer.
Feb 18 2021, 9:49 PM · Restricted Project