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thomasfaingnaert (Thomas Faingnaert)
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Mar 7 2020, 10:15 AM (12 w, 1 d)

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Mar 24 2020

thomasfaingnaert abandoned D75817: [NVPTX] Fix instruction selection for addresses in case of addrspacecasts.

I thought some more on this, and I don't think this is the best solution.
Besides, in most cases (such as the simple example posted above), the CUDA driver seems to do a pretty good job of folding away these extra additions anyway.

Mar 24 2020, 6:24 AM · Restricted Project

Mar 9 2020

thomasfaingnaert added a comment to D75817: [NVPTX] Fix instruction selection for addresses in case of addrspacecasts.
In D75817#1912891, @tra wrote:

While such reordering may be beneficial, in general, GEP(ASC(x)) is not always equivalent of ASC(GEP(x)), so we can't just blindly do it. I believe this has been discussed few times in the past, though I can't find relevant emails now.

Mar 9 2020, 2:35 PM · Restricted Project

Mar 7 2020

thomasfaingnaert updated the diff for D75817: [NVPTX] Fix instruction selection for addresses in case of addrspacecasts.

Addressed clang-tidy warnings.

Mar 7 2020, 2:37 PM · Restricted Project
thomasfaingnaert created D75817: [NVPTX] Fix instruction selection for addresses in case of addrspacecasts.
Mar 7 2020, 1:33 PM · Restricted Project