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ssarda (Suyog Sarda)
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Jul 31 2019, 9:48 AM (183 w, 5 d)

Recent Activity

Nov 21 2022

ssarda added a comment to D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule.

Hi @ssarda, thanks for the test case. That helps to understand the problem. Which appears to be the following MIR,

INLINEASM &"$0 = insert($1,#31,#1);" [attdialect], $0:[regdef], implicit-def $r7, $1:[reguse:IntRegs], %45:intregs
%32:intregs = COPY $r7
$r7 = COPY %32:intregs

These instructions are scheduled in the same cycle. Then, isValidSchedule rejects this because :

// Furthermore, if a physical def/use pair is assigned to the same
// cycle, orderDependence does not guarantee def/use ordering, so that
// case should be considered invalid.
Nov 21 2022, 11:08 PM · Restricted Project, Restricted Project

Nov 14 2022

ssarda updated the diff for D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule.

@bcahoon attached a test case

Nov 14 2022, 2:42 AM · Restricted Project, Restricted Project

Nov 1 2022

Herald added a project to D102693: Do not create LLVM IR `constant`s for objects with dynamic initialisation: Restricted Project.

This patch is causing issue mentioned in https://discourse.llvm.org/t/sema-section-type-conflict/66000

Nov 1 2022, 1:30 AM · Restricted Project, Restricted Project

Oct 20 2022

ssarda added a comment to D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule.

Hi @bcahoon, i am yet to come across a case in Hexagon where in a linear list of instruction, a use occurs before def in orderDependence(). I assume, that's never a case for Hexagon happening yet. As pointed out by @dpenry, orderDependence() is not robust for other targets to make sure that def-use are in proper order, because of which we are trying to avoid same cycle scheduling by having check in isValidSchedule() function. But since, this is not the case with Hexagon target, this patch enables same cycle def-use scheduling for only Hexagon with a flag. Let us know your thoughts over it.

Oct 20 2022, 12:03 AM · Restricted Project, Restricted Project

Oct 18 2022

ssarda added a comment to D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule.

I agree that orderDependence() need to be more robust. However, we can't penalize pipeliner scheduling where def-use are in same cycle. I may add a TODO as of now and keep the flag. Once orderDependence() is fixed, we may remove the flag. Does it sound good?

Oct 18 2022, 10:58 AM · Restricted Project, Restricted Project

Oct 16 2022

ssarda requested review of D136051: [CodeGen] Introduce a flag to allow same cycle def-use schedule.
Oct 16 2022, 8:37 PM · Restricted Project, Restricted Project

Sep 21 2019

ssarda closed D65523: SROA: Check Total Bits of vector type.

Committed in https://llvm.org/viewvc/llvm-project?view=revision&revision=372480

Sep 21 2019, 11:19 AM · Restricted Project
ssarda committed rGcd629ea0a8ef: SROA: Check Total Bits of vector type (authored by ssarda).
SROA: Check Total Bits of vector type
Sep 21 2019, 11:16 AM
ssarda committed rL372480: SROA: Check Total Bits of vector type.
SROA: Check Total Bits of vector type
Sep 21 2019, 11:14 AM
ssarda committed rGc62136e6748f: Test mail. NFC. (authored by ssarda).
Test mail. NFC.
Sep 21 2019, 11:07 AM
ssarda committed rL372479: Test mail. NFC..
Test mail. NFC.
Sep 21 2019, 11:01 AM

Sep 3 2019

ssarda updated the diff for D65523: SROA: Check Total Bits of vector type.

Added comment as suggested.

Sep 3 2019, 8:21 AM · Restricted Project
ssarda added a comment to D65523: SROA: Check Total Bits of vector type.

Gentle Ping !! I would be grateful if someone can review the updated patch.

Sep 3 2019, 7:57 AM · Restricted Project

Aug 20 2019

ssarda added a comment to D65523: SROA: Check Total Bits of vector type.

Gentle Ping!!

Aug 20 2019, 2:52 AM · Restricted Project

Aug 2 2019

ssarda added inline comments to D65523: SROA: Check Total Bits of vector type.
Aug 2 2019, 10:06 AM · Restricted Project
ssarda updated the diff for D65523: SROA: Check Total Bits of vector type.

Updated with 1 more test case.

Aug 2 2019, 10:06 AM · Restricted Project

Jul 31 2019

ssarda created D65523: SROA: Check Total Bits of vector type.
Jul 31 2019, 10:03 AM · Restricted Project