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monkchiang (Monk Chiang)
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User Since
Nov 10 2020, 6:35 PM (124 w, 3 d)

Recent Activity

Feb 7 2023

monkchiang committed rG781dedba3022: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions (authored by monkchiang).
[RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions
Feb 7 2023, 5:43 PM · Restricted Project, Restricted Project
monkchiang closed D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions.
Feb 7 2023, 5:43 PM · Restricted Project, Restricted Project

Feb 2 2023

monkchiang updated the diff for D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions.

Change LMULWriteRes to LMULWriteResFWRed.

Feb 2 2023, 10:09 PM · Restricted Project, Restricted Project

Feb 1 2023

monkchiang updated the diff for D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions.

Address Michael Maitland's comment. Thanks!

Feb 1 2023, 9:09 PM · Restricted Project, Restricted Project

Jan 12 2023

monkchiang added a comment to D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions.

Does it make sense to change the SchedReadss and ReadAdvance to be LMUL specific for this class of instuctions?

Jan 12 2023, 6:04 PM · Restricted Project, Restricted Project

Jan 11 2023

monkchiang added reviewers for D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions: michaelmaitland, craig.topper, reames, frasercrmck, kito-cheng.
Jan 11 2023, 9:25 PM · Restricted Project, Restricted Project
monkchiang requested review of D141565: [RISCV][CodeGen] Account for LMUL from VS2 for Vector Reduction Instructions.
Jan 11 2023, 9:23 PM · Restricted Project, Restricted Project

Dec 7 2022

monkchiang accepted D139562: [RISCV] Support F16 vectors with Zfhmin+Zvfh..

LGTM

Dec 7 2022, 6:41 PM · Restricted Project, Restricted Project

Dec 6 2022

monkchiang committed rG7b50c183601a: [RISCV] Codegen support for Zfhmin. (authored by monkchiang).
[RISCV] Codegen support for Zfhmin.
Dec 6 2022, 10:14 PM · Restricted Project, Restricted Project
monkchiang closed D139391: [RISCV] Codegen support for Zfhmin..
Dec 6 2022, 10:14 PM · Restricted Project, Restricted Project
monkchiang updated the diff for D139391: [RISCV] Codegen support for Zfhmin..

Fix typo, FFSGNJ_S -> FSGNJ_S.

Dec 6 2022, 5:49 PM · Restricted Project, Restricted Project
monkchiang updated the diff for D139391: [RISCV] Codegen support for Zfhmin..

Address comment:

Assgin over DstReg and SrcReg to generate FSJGN_S in RISCVInstrInfo::copyPhysReg()
Dec 6 2022, 5:22 PM · Restricted Project, Restricted Project
monkchiang updated the diff for D139391: [RISCV] Codegen support for Zfhmin..

Address Craig's comment

Dec 6 2022, 1:06 AM · Restricted Project, Restricted Project

Dec 5 2022

monkchiang added reviewers for D139391: [RISCV] Codegen support for Zfhmin.: craig.topper, asb, frasercrmck, Hsiang-Kai.
Dec 5 2022, 9:53 PM · Restricted Project, Restricted Project
monkchiang requested review of D139391: [RISCV] Codegen support for Zfhmin..
Dec 5 2022, 9:49 PM · Restricted Project, Restricted Project

Sep 11 2022

monkchiang accepted D133632: [RISCV] Rename WriteFALU* and ReadFALU* to WriteFAdd*/ReadFAdd*..

LGTM

Sep 11 2022, 11:16 PM · Restricted Project, Restricted Project

Aug 16 2022

monkchiang committed rG0af4651c0fc7: [RISCV] Add scheduling class for vector pseudo segment instructions. (authored by monkchiang).
[RISCV] Add scheduling class for vector pseudo segment instructions.
Aug 16 2022, 5:55 PM · Restricted Project, Restricted Project
monkchiang closed D130222: [RISCV] Add scheduling class for vector pseudo segment instructions..
Aug 16 2022, 5:54 PM · Restricted Project, Restricted Project

Aug 8 2022

monkchiang accepted D131379: [RISCV] Add ReadFStoreData as a SchedRead..
Aug 8 2022, 12:02 AM · Restricted Project, Restricted Project
monkchiang added a comment to D131379: [RISCV] Add ReadFStoreData as a SchedRead..

LGTM

Aug 8 2022, 12:02 AM · Restricted Project, Restricted Project

Aug 1 2022

monkchiang accepted D130945: [RISCV] Add scheduler classes to PseudoVMV*R_V..

LGTM

Aug 1 2022, 11:49 PM · Restricted Project, Restricted Project
monkchiang accepted D130938: [RISCV] Add scheduler class to PseudoReadVLENB..

LGTM

Aug 1 2022, 11:47 PM · Restricted Project, Restricted Project

Jul 24 2022

monkchiang added reviewers for D130222: [RISCV] Add scheduling class for vector pseudo segment instructions.: asb, frasercrmck, HsiangKai.
Jul 24 2022, 7:02 PM · Restricted Project, Restricted Project

Jul 20 2022

monkchiang added a reviewer for D130222: [RISCV] Add scheduling class for vector pseudo segment instructions.: craig.topper.
Jul 20 2022, 8:59 PM · Restricted Project, Restricted Project
monkchiang requested review of D130222: [RISCV] Add scheduling class for vector pseudo segment instructions..
Jul 20 2022, 8:57 PM · Restricted Project, Restricted Project

Jul 12 2022

monkchiang committed rG2b045324b2ca: [RISCV] Add scheduling resources for vector segment instructions. (authored by monkchiang).
[RISCV] Add scheduling resources for vector segment instructions.
Jul 12 2022, 10:52 PM · Restricted Project, Restricted Project
monkchiang closed D128886: [RISCV] Add scheduling resources for vector segment instructions..
Jul 12 2022, 10:52 PM · Restricted Project, Restricted Project

Jun 30 2022

monkchiang updated the diff for D128886: [RISCV] Add scheduling resources for vector segment instructions..

Address comment:

  1. Remove ReadVLDSX from VLSEGSched, VLSEGFFSched.
  2. Add index vector register read for indexed segment load/store.
Jun 30 2022, 6:01 PM · Restricted Project, Restricted Project
monkchiang updated the diff for D128886: [RISCV] Add scheduling resources for vector segment instructions..

Fix typo

Jun 30 2022, 12:50 AM · Restricted Project, Restricted Project
monkchiang added reviewers for D128886: [RISCV] Add scheduling resources for vector segment instructions.: craig.topper, frasercrmck, HsiangKai, asb, evandro.
Jun 30 2022, 12:45 AM · Restricted Project, Restricted Project
monkchiang requested review of D128886: [RISCV] Add scheduling resources for vector segment instructions..
Jun 30 2022, 12:43 AM · Restricted Project, Restricted Project

Feb 16 2022

monkchiang accepted D119920: [RISCV][NFC] Add tail agnostic tests for nomask Vector Reduction IR intrinsics..

LGTM. Thanks for adding the test case.

Feb 16 2022, 9:52 PM · Restricted Project

Feb 15 2022

monkchiang accepted D119727: [RISCV] Add the policy operand for nomask vector Multiply-Add IR intrinsics..

LGTM, Thanks.

Feb 15 2022, 6:54 PM · Restricted Project, Restricted Project

Dec 7 2021

monkchiang added a comment to D115310: [RISCV] Use MULHU for more division by constant cases..

LGTM.

Dec 7 2021, 11:29 PM · Restricted Project

Dec 30 2020

monkchiang committed rG1d04cbeb4353: [RISCV] Define vector single-width type-convert intrinsic. (authored by monkchiang).
[RISCV] Define vector single-width type-convert intrinsic.
Dec 30 2020, 7:57 PM
monkchiang committed rG2aed9bc98ab6: [RISCV] Define vector narrowing type-convert intrinsic. (authored by monkchiang).
[RISCV] Define vector narrowing type-convert intrinsic.
Dec 30 2020, 7:57 PM
monkchiang committed rGfdd30faae5b6: [RISCV] Define vector widening type-convert intrinsic. (authored by monkchiang).
[RISCV] Define vector widening type-convert intrinsic.
Dec 30 2020, 7:57 PM
monkchiang closed D93933: [RISCV] Define vector single-width type-convert intrinsic..
Dec 30 2020, 7:57 PM · Restricted Project
monkchiang closed D93932: [RISCV] Define vector narrowing type-convert intrinsic..
Dec 30 2020, 7:57 PM · Restricted Project
monkchiang closed D93855: [RISCV] Define vector widening type-convert intrinsic..
Dec 30 2020, 7:57 PM · Restricted Project
monkchiang committed rGecc38eac7669: Add intrinsic testcase for some missing widening reduction. (authored by monkchiang).
Add intrinsic testcase for some missing widening reduction.
Dec 30 2020, 7:15 PM
monkchiang closed D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..
Dec 30 2020, 7:15 PM · Restricted Project
monkchiang updated the diff for D93932: [RISCV] Define vector narrowing type-convert intrinsic..
  1. Add earlyclobber constraint
  2. support float16 to i8 conversion for vfncvt.xu.f / vfncvt.x.f / vfncvt.rtz.xu.f / vfcvt.rtz.x.f
  3. Add float16 to i8 conversion test cases
Dec 30 2020, 4:57 AM · Restricted Project
monkchiang added a comment to D93855: [RISCV] Define vector widening type-convert intrinsic..

I don't think my earlyclobber question from earlier was addressed?

Dec 30 2020, 4:54 AM · Restricted Project
monkchiang updated the diff for D93855: [RISCV] Define vector widening type-convert intrinsic..
  1. Add earlyclobber constraint
  2. vfwcvt.f.xu and vfwcvt.f.x support i8 to float16 conversion
  3. Add new test cases for vfwcvt.f.xu and vfwcvt.f.x
Dec 30 2020, 4:52 AM · Restricted Project

Dec 29 2020

monkchiang requested review of D93933: [RISCV] Define vector single-width type-convert intrinsic..
Dec 29 2020, 11:02 PM · Restricted Project
monkchiang requested review of D93932: [RISCV] Define vector narrowing type-convert intrinsic..
Dec 29 2020, 10:58 PM · Restricted Project
monkchiang updated the diff for D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..

address @craig.topper 's comments

Dec 29 2020, 10:50 PM · Restricted Project
monkchiang updated the diff for D93855: [RISCV] Define vector widening type-convert intrinsic..

Remove i64 to float in RV32 test case for fwcvt.xu.f.v/fwcvt.x.f.v/fwcvt.rtz.xu.f.v/fwcvt.rtz.x.f.v intrinsic.

Dec 29 2020, 8:13 PM · Restricted Project
monkchiang updated the diff for D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..

Add vredsum and vredsumu test cases

Dec 29 2020, 7:37 PM · Restricted Project
monkchiang updated the summary of D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..
Dec 29 2020, 7:35 PM · Restricted Project
monkchiang added a comment to D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..

Add missing float->double tests for rv32.

Are you also going to add the integer tests to this patch or will that be another patch?

Dec 29 2020, 5:26 PM · Restricted Project
monkchiang added a comment to D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..
Dec 29 2020, 5:16 PM · Restricted Project
monkchiang updated the diff for D93855: [RISCV] Define vector widening type-convert intrinsic..

Remove unneeded class, and Add several missing test cases for RV32.
All of mask test cases follow-up D93878.

Dec 29 2020, 1:28 PM · Restricted Project
monkchiang updated the diff for D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..

Add missing float->double tests for rv32.

Dec 29 2020, 1:18 PM · Restricted Project

Dec 28 2020

monkchiang requested review of D93887: [RISCV] Add intrinsic testcase for some missing widening reduction..
Dec 28 2020, 10:16 PM · Restricted Project
monkchiang updated the diff for D93855: [RISCV] Define vector widening type-convert intrinsic..

address @craig.topper 's comments, and rebase the patch.
thanks!

Dec 28 2020, 7:05 PM · Restricted Project
monkchiang requested review of D93855: [RISCV] Define vector widening type-convert intrinsic..
Dec 28 2020, 2:22 AM · Restricted Project

Dec 26 2020

monkchiang committed rG622ea9cf74bc: [RISCV] Define vector widening reduction intrinsic. (authored by monkchiang).
[RISCV] Define vector widening reduction intrinsic.
Dec 26 2020, 5:44 AM
monkchiang closed D93807: [RISCV] Define vector widening reduction intrinsic..
Dec 26 2020, 5:43 AM · Restricted Project

Dec 24 2020

monkchiang requested review of D93807: [RISCV] Define vector widening reduction intrinsic..
Dec 24 2020, 6:12 PM · Restricted Project
monkchiang committed rGafd03cd33582: [RISCV] Define vector single-width reduction intrinsic. (authored by monkchiang).
[RISCV] Define vector single-width reduction intrinsic.
Dec 24 2020, 5:57 PM
monkchiang closed D93746: [RISCV] Define vector single-width reduction intrinsic..
Dec 24 2020, 5:56 PM · Restricted Project

Dec 23 2020

monkchiang updated the diff for D93746: [RISCV] Define vector single-width reduction intrinsic..

Remove redundant constraint in VPseudoReductionV_VS class

Dec 23 2020, 6:22 PM · Restricted Project
monkchiang closed D93508: [RISCV] Define the remaining vector fixed-point arithmetic intrinsics.

Closed by 3183add5343e5

Dec 23 2020, 6:15 PM · Restricted Project
monkchiang updated the diff for D93746: [RISCV] Define vector single-width reduction intrinsic..

Fix comment in IntrinsicsRISCV.td

Dec 23 2020, 4:56 PM · Restricted Project

Dec 22 2020

monkchiang requested review of D93746: [RISCV] Define vector single-width reduction intrinsic..
Dec 22 2020, 10:36 PM · Restricted Project

Dec 20 2020

monkchiang committed rG3183add5343e: [RISCV] Define the remaining vector fixed-point arithmetic intrinsics. (authored by monkchiang).
[RISCV] Define the remaining vector fixed-point arithmetic intrinsics.
Dec 20 2020, 11:01 PM

Dec 17 2020

monkchiang updated the summary of D93508: [RISCV] Define the remaining vector fixed-point arithmetic intrinsics.
Dec 17 2020, 8:02 PM · Restricted Project
monkchiang updated the summary of D93508: [RISCV] Define the remaining vector fixed-point arithmetic intrinsics.
Dec 17 2020, 7:51 PM · Restricted Project
monkchiang updated the summary of D93508: [RISCV] Define the remaining vector fixed-point arithmetic intrinsics.
Dec 17 2020, 7:50 PM · Restricted Project
monkchiang requested review of D93508: [RISCV] Define the remaining vector fixed-point arithmetic intrinsics.
Dec 17 2020, 7:49 PM · Restricted Project
monkchiang updated the diff for D93366: [RISCV] Define vsadd/vsaddu/vssub/vssubu intrinsics..

Use II->ExtendedOperand be condition for if statement.

Dec 17 2020, 2:05 PM · Restricted Project
monkchiang updated the diff for D93366: [RISCV] Define vsadd/vsaddu/vssub/vssubu intrinsics..

Let ExtendOperand direct really need to extend a operand.
Correct get operands when we use it in LowerIntrinsic_W_CHAIN

Dec 17 2020, 3:52 AM · Restricted Project

Dec 16 2020

monkchiang updated the diff for D93366: [RISCV] Define vsadd/vsaddu/vssub/vssubu intrinsics..

rebase main branch.

Dec 16 2020, 10:43 PM · Restricted Project

Dec 15 2020

monkchiang requested review of D93366: [RISCV] Define vsadd/vsaddu/vssub/vssubu intrinsics..
Dec 15 2020, 9:28 PM · Restricted Project