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lihuang (Li Huang)
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Jan 28 2016, 4:01 PM (201 w, 6 d)

Recent Activity

Oct 21 2016

lihuang committed rL284868: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor..
[SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor.
Oct 21 2016, 1:14 PM
lihuang closed D25810: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606 by committing rL284868: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor..
Oct 21 2016, 1:14 PM
lihuang added inline comments to D25810: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606.
Oct 21 2016, 11:56 AM
lihuang added inline comments to D25810: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606.
Oct 21 2016, 11:19 AM

Oct 20 2016

lihuang added inline comments to D25810: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606.
Oct 20 2016, 5:37 PM
lihuang updated the diff for D25810: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606.
Oct 20 2016, 5:20 PM
lihuang committed rL284784: [SCEV] Add a threshold to restrict number of mul operands to be inlined into….
[SCEV] Add a threshold to restrict number of mul operands to be inlined into…
Oct 20 2016, 2:48 PM
lihuang closed D25794: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV by committing rL284784: [SCEV] Add a threshold to restrict number of mul operands to be inlined into….
Oct 20 2016, 2:48 PM
lihuang added inline comments to D25794: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV.
Oct 20 2016, 1:01 PM
lihuang updated the diff for D25794: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV.
Oct 20 2016, 12:56 PM

Oct 19 2016

lihuang retitled D25810: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606 from to [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606.
Oct 19 2016, 5:56 PM
lihuang added a child revision for D25794: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV: D25810: [SCEV] Memoize visitMulExpr results in SCEVRewriteVisitor. Fix PR18606.
Oct 19 2016, 5:56 PM
lihuang abandoned D25758: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV.
Oct 19 2016, 2:21 PM
lihuang retitled D25794: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV from to [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV.
Oct 19 2016, 2:20 PM
lihuang added a comment to D25758: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV.

Okay, I will re-create a revision.

Oct 19 2016, 1:27 PM
lihuang updated subscribers of D25758: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV.
Oct 19 2016, 12:17 PM

Oct 18 2016

lihuang retitled D25758: [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV from to [SCEV] Add a threshold to restrict number of mul operands to be inlined into SCEV.
Oct 18 2016, 11:15 PM

Oct 15 2016

lihuang committed rL284307: Test commit. (NFC).
Test commit. (NFC)
Oct 15 2016, 12:09 PM

Sep 30 2016

lihuang added a comment to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Hi Sanjoy and Artur,

Sep 30 2016, 6:06 PM
lihuang reopened D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.
Sep 30 2016, 10:07 AM
lihuang updated the diff for D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Rebase this patch to latest source.

Sep 30 2016, 10:06 AM

Sep 28 2016

lihuang closed D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.
Sep 28 2016, 5:38 PM

Sep 26 2016

lihuang added a comment to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.
Sep 26 2016, 2:28 PM
lihuang updated the diff for D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.
Sep 26 2016, 2:28 PM
lihuang added inline comments to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.
Sep 26 2016, 1:27 PM
lihuang added inline comments to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.
Sep 26 2016, 1:07 PM
lihuang updated the diff for D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.
Sep 26 2016, 1:05 PM

Sep 23 2016

lihuang added a comment to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Add another test case where zext should not be removed.

Sep 23 2016, 3:44 PM
lihuang updated the diff for D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Address Sanjoy's comments.

Sep 23 2016, 3:25 PM

Sep 16 2016

lihuang added a comment to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Hi Sanjoy,

Sep 16 2016, 11:41 PM
lihuang added a comment to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Do you think this is the right direction?

Sep 16 2016, 12:00 PM

Sep 10 2016

lihuang updated the diff for D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Canonicalize on zext when IV is known non-negative. Then, for each def-use pair of IV users, choose the kind of extension based on the following strategy:

Sep 10 2016, 6:45 PM

Sep 7 2016

lihuang added a comment to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

InstCombine canonicalizes on zexts when the value is non-negative. I will try canonicalizing on zext and teach getWideRecurrence to return a valid AddRec when the non-negative value is zero-extended.

Sep 7 2016, 6:14 PM
lihuang added a comment to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Hi Philip, Sanjoy,

Sep 7 2016, 5:17 PM
lihuang added a comment to D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Another way of framing the possible fix is to change:

// Our raison d'etre! Eliminate sign and zero extension.
if (IsSigned ? isa<SExtInst>(DU.NarrowUse) : isa<ZExtInst>(DU.NarrowUse))

To:

if ((DU.NeverNegative && (isa<SExtInst>(DU.NarrowUse) || isa<ZExtInst>(DU.NarrowUse))) ||
   (IsSigned ? isa<SExtInst>(DU.NarrowUse) : isa<ZExtInst>(DU.NarrowUse)))

Obviously, clean up the code please. :)

This handles the sext/zext cases, but not the GEP cases. That still needs the getWideRecurrence parts.

Sep 7 2016, 4:58 PM

Sep 6 2016

lihuang updated subscribers of D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.
Sep 6 2016, 2:59 PM
lihuang updated the diff for D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV.

Sorry, didn't generate a full diff.

Sep 6 2016, 2:40 PM
lihuang retitled D24280: [IndVarSimplify] Wisely choose sext or zext when widening IV from to [IndVarSimplify] Prefer sext over zext when widening IV if it is non-negative and has a GEP user.
Sep 6 2016, 2:37 PM

Sep 2 2016

lihuang closed D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Sep 2 2016, 2:51 PM

Aug 24 2016

lihuang updated subscribers of D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .
Aug 24 2016, 1:05 PM
lihuang updated subscribers of D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.
Aug 24 2016, 1:04 PM

Aug 23 2016

lihuang added a comment to D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 23 2016, 1:36 PM

Aug 22 2016

lihuang updated the diff for D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 22 2016, 5:16 PM
lihuang updated the diff for D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.

Should clear KnownZero and KnownOne bits when there is conflicts to allow propagation of undef. Changed the code in computeKnownBitsFromShiftOperator to have the same logic as that at the end of this function.

Aug 22 2016, 4:26 PM
lihuang added inline comments to D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 22 2016, 4:06 PM
lihuang added inline comments to D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 22 2016, 2:50 PM
lihuang added inline comments to D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 22 2016, 2:03 PM
lihuang updated the diff for D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 22 2016, 1:59 PM

Aug 18 2016

lihuang added a comment to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

The problem is in indvarsimplify, this patch results in redundant trunc/sext that should be eliminated by indvarsimplify but not, causing the loop in TSVC/s174 not vectorizable. I will submit a fix for review.

Aug 18 2016, 10:10 AM

Aug 17 2016

lihuang edited reviewers for D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag, added: majnemer; removed: hfinkel.
Aug 17 2016, 2:07 PM

Aug 16 2016

lihuang added a comment to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

I will look into the regressions on public benchmarks.

Aug 16 2016, 2:26 PM
lihuang requested review of D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 16 2016, 11:35 AM
lihuang updated the diff for D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.

Hi Sanjoy,

Aug 16 2016, 11:31 AM
lihuang reopened D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.

reopen this review because the committed change has been reverted

Aug 16 2016, 11:26 AM

Aug 15 2016

lihuang abandoned D23468: [ValueTracking] Sign bit of shl cannot be both known one and known zero. Fix PR28926 .

Abandon this patch as r278172 has been reverted.

Aug 15 2016, 2:35 PM
lihuang added inline comments to D23468: [ValueTracking] Sign bit of shl cannot be both known one and known zero. Fix PR28926 .
Aug 15 2016, 2:30 PM
lihuang added inline comments to D23468: [ValueTracking] Sign bit of shl cannot be both known one and known zero. Fix PR28926 .
Aug 15 2016, 2:05 PM
lihuang added a comment to D23468: [ValueTracking] Sign bit of shl cannot be both known one and known zero. Fix PR28926 .

Sorry, the related PR number is 28946
https://llvm.org/bugs/show_bug.cgi?id=28946

Aug 15 2016, 12:30 PM
lihuang added a reviewer for D23468: [ValueTracking] Sign bit of shl cannot be both known one and known zero. Fix PR28926 : hfinkel.
Aug 15 2016, 10:16 AM

Aug 12 2016

lihuang retitled D23468: [ValueTracking] Sign bit of shl cannot be both known one and known zero. Fix PR28926 from to [ValueTracking] Sign bit of shl cannot be both known one and known zero. Fix PR28926 .
Aug 12 2016, 2:53 PM

Aug 10 2016

lihuang abandoned D21773: [clang] Update an optimization remark test for change D18777.
Aug 10 2016, 3:05 PM
lihuang added a comment to D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.

This review was not closed automatically. Committed as r278172

Aug 10 2016, 12:27 PM
lihuang closed D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 10 2016, 11:02 AM
lihuang abandoned D23227: [IndVarSimplify] Integrate changes in D18777 and D18867 which depend on each other.
Aug 10 2016, 9:49 AM

Aug 9 2016

lihuang added a comment to D23227: [IndVarSimplify] Integrate changes in D18777 and D18867 which depend on each other.

Hi Sanjoy,

Aug 9 2016, 1:10 PM
lihuang added inline comments to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.
Aug 9 2016, 12:58 PM
lihuang updated the diff for D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Use APInt::setBit, fix the indentation

Aug 9 2016, 12:57 PM
lihuang updated the diff for D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.

Use APInt::setBit, add comment

Aug 9 2016, 12:23 PM
lihuang added inline comments to D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 9 2016, 11:10 AM

Aug 8 2016

lihuang added a comment to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

The non-negative shift part goes to patch D23296.

Aug 8 2016, 10:45 PM
lihuang retitled D23296: [ValueTracking] Improve ValueTracking on left shift with nsw flag from to [ValueTracking] Improve ValueTracking on left shift with nsw flag.
Aug 8 2016, 10:44 PM
lihuang updated the diff for D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Separate the non-negative shift changes to another patch. Address Sanjoy's comments.

Aug 8 2016, 3:46 PM
lihuang added inline comments to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.
Aug 8 2016, 12:22 PM

Aug 5 2016

lihuang added a comment to D23227: [IndVarSimplify] Integrate changes in D18777 and D18867 which depend on each other.

Hi Sanjoy,

Aug 5 2016, 2:40 PM
lihuang retitled D23227: [IndVarSimplify] Integrate changes in D18777 and D18867 which depend on each other from to [IndVarSimplify] Integrate changes in D18777 and D18867 which depend on each other.
Aug 5 2016, 2:37 PM

Aug 4 2016

lihuang added a comment to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Another Ping for this patch :).

Aug 4 2016, 12:25 PM

Aug 3 2016

lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Ping :)

Aug 3 2016, 4:25 PM
lihuang updated subscribers of D3127: [ScalarEvolution]Fix PR18607 resulting in long compilation time and memory usage.
Aug 3 2016, 12:56 PM

Jul 29 2016

lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Hi Sanjoy,

Jul 29 2016, 9:57 AM

Jul 27 2016

lihuang updated the diff for D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Rebase this change on latest source. The test in D21773 should be fixed by D18867.

Jul 27 2016, 5:15 PM
lihuang updated the diff for D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .
Jul 27 2016, 5:07 PM
lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

+1 to both comments by @mbodart

Specifically with regards to the isKnownNonNegative comment: if isKnownPredicate is failing here, you might consider teaching it to use getSignedRange internally, since the range SCEV computes for %i.0 is [0,-2147483648) (all positive integers) so we should be able to use that information.

Jul 27 2016, 11:38 AM

Jul 14 2016

lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Actually, adding -loop-rotate just happens to work for this case, it doesn't solve the fundamental problem. For example, adding -loop-rotate or other loop pass sequences doesn't help with the case in D21773

Jul 14 2016, 10:15 AM

Jun 29 2016

lihuang added a comment to D21773: [clang] Update an optimization remark test for change D18777.

You are right. A regression test could be:

Jun 29 2016, 5:59 PM

Jun 28 2016

lihuang added a comment to D21773: [clang] Update an optimization remark test for change D18777.

Hi Adam,

Jun 28 2016, 8:02 PM

Jun 27 2016

lihuang added a comment to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Rebase the same patch on the latest source.

This ValueTracking change breaks a FE test (clang/test/Frontend/optimization-remark-options.c), but now the test could be fixed by D18777 and D21773.

Jun 27 2016, 4:21 PM
lihuang updated the diff for D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Rebase the same patch on the latest source.

Jun 27 2016, 4:19 PM
lihuang retitled D21773: [clang] Update an optimization remark test for change D18777 from to [clang] Update an optimization remark test for change D18777.
Jun 27 2016, 4:12 PM
lihuang updated the diff for D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Removed the isKnownNonNegative part, created a new file for the 2 tests. As Sanjoy pointed out, isKnownPredicate didn't work with these cases because the loops are not in canonical form. Using loop-rotate before indvars solves the issue.

Jun 27 2016, 2:28 PM

Jun 20 2016

lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Using -loop-rotate works for these cases, as the "%add = add nsw i32 %i.0, 2" is brought to loop header and "nsw" is propagated. Thank you Sanjoy!

Jun 20 2016, 8:34 AM

Jun 15 2016

lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

I looked at the threads on llvm-dev discussing the no-wrap flag propagation issues. It seems like this has been a problem for a while and there is not a clear agreement on when and how to propagate no-wrap flags from instructions to corresponding SCEVs.

Jun 15 2016, 9:31 AM

Apr 27 2016

lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Hi Sanjoy and Philip,

Apr 27 2016, 3:35 PM

Apr 21 2016

lihuang updated the diff for D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.
Apr 21 2016, 4:14 PM
lihuang added inline comments to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .
Apr 21 2016, 4:05 PM
lihuang updated the diff for D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Sorry for the late reply, took sick days.

Apr 21 2016, 4:04 PM
lihuang updated the diff for D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Address Mitch's comments.

Apr 21 2016, 9:58 AM

Apr 15 2016

lihuang updated D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .
Apr 15 2016, 9:46 AM

Apr 14 2016

lihuang added a comment to D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .
Apr 14 2016, 3:28 PM
lihuang updated the diff for D18867: [IndVarSimplify] Eliminate zext of a signed IV when the IV is known to be non-negative .

Add a test to this change.

Apr 14 2016, 3:27 PM

Apr 13 2016

lihuang added a comment to D18777: [ValueTracking] An improvement to IR ValueTracking on Non-negative Integers.

Ping :), any suggestions/comments on this change?

Apr 13 2016, 10:20 AM