Can someone please review this patch?

In D53005#1259889, @arsenm wrote:

I'd prefer to rename this to MachineLoopUnroll to match the IR pass name

In D53005#1258653, @dmgreen wrote:

Hello. Very nice. I don't think I can speak to much of the detail here, especially the Hexagon parts, but can you:

• Add full context to the patch (-U99999)
• Replace the copyright headers to be more "llvmy"

Please enable assembler test only for the Hexagon backend.

Thanks for the explanation Tim. It makes perfect sense.

def : Pat <(stOp (OpNode (ldOp (addrPred IntRegs:$addr, extPred:$offset)),
                         immPred:$bitend),
                 (addrPred (i32 IntRegs:$addr), extPred:$offset)),
           (MI IntRegs:$addr, extPred:$offset, (xformFunc immPred:$bitend))>;

}

These timing classes have no effect on V4 instruction set so there is no easy way to test them at this point. However, I'll be adding tests to verify timing classes when add V5 support.