User Details
- User Since
- Jan 14 2016, 8:08 AM (402 w, 4 d)
Aug 11 2021
Aug 5 2021
Ping. This change only adds links to files that are already uploaded, so I'm not sure what more I need to do.
Jun 30 2021
Jun 28 2021
Jan 15 2021
There isn't any support for ILP32 in the mainline Linux kernel, and there isn't likely to be. However, mainline glibc has had ILP32 support. I don't know the current status.
Jan 12 2021
LGTM. I think someone else has to approve it.
In D16213 I introduced the MCTargetOptions argument to the MCAsmBackend constructor, as well as in constructor wrapper functions. This change touched multiple (every, probably) backend. Given the extension to embed the ABI in the Triple, can the MCTargetOptions argument be removed? That shouldn't be in this commit, I think.
Jan 5 2021
I'm happy to see this change. It has been on my TO DO list for a very long time. I will review it soon.
May 13 2020
May 6 2020
I don't think it makes sense to combine two unrelated things SVE and PA support into a combined thing. Since we already have UnsupportedFeatures in every sub-target .td file, I think it would be better to instead have:
It is okay'ish to set CompleteModel = 0 if you're not interested in describing all instructions. The other way is of course to add the missing instruction to the model.
In email Wei asked for help about he following error message:
Oct 7 2019
Jun 10 2019
I know this is a little late, but is the second run line of test/CodeGen/AArch64/arm64-popcnt.ll correct? If I build with -DLLVM_TARGETS_TO_BUILD=AArch64;X86 I get an error. As far as I can tell, using grep -l 'RUN.*triple=armv8' -R ../test/ armv8a is dealt with as an ARM target, not an AArch64 one, which is weird in and of itself.
Apr 11 2019
I think this is a coherent set of changes. Given the current top of trunk, this expands support from just assembly/disassembly of machine instructions to include LLVM IR, right? Such being the case, I think this patch should go in. I have some ideas on how to structure passes so SV IR supporting optimizations can be added incrementally. If anyone thinks such a proposal would help, let me know.
Feb 27 2019
I'm not sure what the proposed split would consist of. Would it be
- A patch consisting of only the changes in Intrinsics.td which would be applied first. Wouldn't the changes in SelectionDAG be required as well?
- Everything but the changes in TargetLibraryInfo.cpp etc. for supporting SLEEF and including any related test cases that would be upstreamed 2nd?
Would the second choice be useful by itself? Either in functionality or improved cross-platform testing before the SLEEF support went in?
Jan 18 2018
It looks like the latest changes address the earlier concerns expressed in the review comments:
Jan 10 2018
Okay, I'll be sure to add "[AArch64]" when I do the commit.
Nov 16 2017
Since I don't perceive a requirement that the benchmark source continue to exactly match that of the original, I would prefer just changing the benchmark source to not conflict.
Oct 10 2017
Jul 18 2017
Remove assumption that the build directory is a subdirectory of the source directory.
Jul 14 2017
Describe distinction between sched model and itinerary vis-a-vis schedcover.py.
Give complete command for llvm-tblgen debug output
If you know the command, I agree that digging through the verbose make output is unnecessary. I'll give the entire command and make your suggested change vis-a-vis distinguishing itinerary and machine scheduler model.
Jul 12 2017
Thanks Stefan. LGTM
Jul 6 2017
LGTM
Used complete file diff
Jul 5 2017
Stefan has been doing the back-end as well.
Jun 27 2017
Jun 26 2017
Ping?
Jun 22 2017
I concur with the analysis for ThunderXT99.
Jun 20 2017
Removed matching on "^SUB" which was inadvertently matching "SUBREG_TO_REG", with resulting failure in test/Codegen/AArch64/machine-combine-madd.ll
There is an issue with madd not being generated when this revision is applied to ToT. I have a fix that I will upload. It appears I have to commandeer the revision to do this?
Jun 6 2017
I'm okay with this change
Jun 2 2017
I can probably scare up whether this impacts ThunderX processors. What benchmark should I look at? OpenSSL?
Apr 30 2017
- 0x07b is now named R_AARCH64_P32_TLSDESC_ADR_PREL21
- "#include... Debug " removed
- Tests for R_AARCH64_P32_TLSLE_LD128_TPREL_LO12 and ...ST..._NC added
- For R_AARCH64_TLSDESC_ADR_PREL19, documented in summary as definition added, but not implemented.
- Documented as definitions added, but not implemented: R_AARCH64_P32_TLSGD_ADR_PREL21, R_AARCH64_P32_TLSGD_ADR_PAGE21, R_AARCH64_P32_TLSGD_ADD_LO12_NC
- I've added tests to arm{64,32}-{elf,tls}-relocs.s. I've added an encoding test for LDST128_ABS_LO12_NC to arm{64,32}-elf-relocs.s instead of where the other encoding tests are, arm{64,32}-tls-relocs.s, as this relocation isn't for TLS.
Apr 26 2017
Address comments about missing tests (for those relocations intended to implemented) and about misnamed relocation.
Apr 25 2017
As noted in the inline comments, there are several relocations with no implementations in LP64 or ILP32. My intent with this patch was towards the goal of ILP32 parity with LP64. I still need to file a defect for the missing functionality.
Apr 20 2017
Ping
Apr 19 2017
Ping
Apr 18 2017
Apr 13 2017
This revision is included in an omnibus ILP32 relocation change: https://reviews.llvm.org/D32072
This revision is included in an omnibus ILP32 relocation change: https://reviews.llvm.org/D32072
This revision is included in an omnibus ILP32 relocation change: https://reviews.llvm.org/D32072
Apr 6 2017
Improve consistency of capitalization of MIPS, types vs. register classes, etc.
Apr 4 2017
Updated per comments.
Thanks for all your comments. I'm about to post a new revision modified per your comments.
Apr 3 2017
Mar 3 2017
Feb 28 2017
I haven't abandoned this patch. In working on this one, I've found several issues that I am going to deal with first.
Feb 1 2017
Jan 31 2017
Jan 26 2017
Nov 28 2016
Nov 23 2016
Added requested explanation of what LSE is.
Ping?
Nov 14 2016
Nov 2 2016
I'm splitting this revision into two parts, One will be to have the target names match those in the GCC proposal (see the gcc-patches mailing list, 1 November 2016, https://gcc.gnu.org/ml/gcc-patches/2016-11/msg00155.html). The other will be a fix to the instruction mapping to scheduling information.
I'm in charge of this revision now.
Oct 24 2016
Oct 21 2016
Oct 19 2016
AArch64 ILP32 relocations for assembly and ELF
Oct 18 2016
Ping?
We also have some parsing tests to make sure we're not loosing anything, but I agree, the number of relevant tests there is not great.
I think this can be a task for a separate patch.
cheers,
--renato
Oct 11 2016
I'm going to be working on this patch from Ananth. For the AsmParser test, I'm assuming that the file being referred to is: unittests/Support/TargetParserTest.cpp? If so, I have several questions:
- What is this testing exactly? It just seems to be repeating the information in include/llvm/Support/AArch64TargetParser.def
- Is simply adding "thunderx" to the "CPU" array initialization sufficient?
Add relocations for AArch64 ILP32. Includes:
Oct 5 2016
Does anyone have any comments on the code as it is now, i. e.:
- Relocation names matching standard
- Correct comment about specification version
- Use of macros to reduce duplicate code (both "?:" and error strings)
AArch64 ILP32 relocations for assembly and ELF
Add relocations for AArch64 ILP32. Includes:
Oct 4 2016
Thanks for your detailed comments. I have made the changes suggested earlier with regard to the proper names (R_AARCH32* -> R_AARCH64_P32). I agree with your comment about the repeated code. A macro that mimics the tables in the specification is probably clearer. I'll try that and see how it goes. I also concur with your comment about the text of the error messages.
Oct 3 2016
Thanks for your comments. I'll change the relocation names and change the citation to use the internal revision history name and make a comment about the discrepancy with the cover page.
Oct 1 2016
Jul 25 2016
Trying to get "arc commit" to not complain about "generated from '', but current working copy root is '/llvm/trunk'"
Jul 19 2016
Ping. This change needs to be made once D16213 goes in.
Thanks for your comments. I'll take your advice and push forward.
Jul 18 2016
I'm trying to reconcile how this patch should interact with the set of proposed patches rooted at: https://reviews.llvm.org/D21465
The have similar goals, that is to support ABIs in a uniform fashion.
Jul 6 2016
I've tried doing a commit using "arc commit --revision D16213", but I seem to have forgotten my password. Further, I'm 100% certain my email was set to the one at Apple. Could someone do the commit and the associated clang change for me?
Jul 5 2016
Updated to ToT. Passes "make check-clang"
Rebased against ToT. Passes "make check".
Jun 27 2016
Thanks for the follow up. I haven't gotten back to the work that motivated
the change. Would it be better to somehow retract the change and start
fresh when I pick up the work again? I don't follow LLVM development
closely enough to know the proper procedure.
Feb 26 2016
The FIXME comment doesn't make sense to me. I'm not sure what sanitizer arguments would be passed to the assembler.
Feb 4 2016
Ping.
Jan 27 2016
Did you mean remove the duplication from addPassesToEmitFile mentioned in the FIXME or something else?
Jan 25 2016
I've made the necessary change to clang and put it in: