- User Since
- Nov 12 2020, 6:37 AM (26 w, 3 d)
Mon, Apr 19
Abandoned because was replaced by D98977
Abandoned because was replaced by D98976
Now using APInt (thanks for that.... I'd wanted something like that but had forgotten what it was called!) and a helper function.
Created helper function and used APInt instead of uint64_t.
Fri, Apr 16
Fixed a comment
Marked comments as done which are no longer relevant to the code.
Major rework to address review comments. Much simpler code!
Apr 15 2021
OK, I think we are in agreement about what they're supposed to allow/disallow when ResourceCycles is uniform. I'd like to make a stab at making this work in the general cases of SchedWriteRes you mentioned before as well:
Apr 14 2021
Added a test case
I have added a test case which might clarify how the scheduling improves with the scheduler changes; the t2ADDrr is able to dual-issue with VADDD, but VLDRS is not.
Apr 13 2021
Apr 12 2021
Apr 7 2021
Mar 19 2021
Messed up and wanted another revision before this one and can't convince arc to do the right thing for me.
Mar 11 2021
OK. So X86 isn't a concern because it isn't using MachineScheduler (at least not post-RA).
Mar 10 2021
Jan 19 2021
Jan 18 2021
Jan 13 2021
Dec 21 2020
More formatting changes
Dec 18 2020
Formatting and variable name changes