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dancgr (Danilo Carvalho Grael)
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User Since
Oct 17 2019, 7:31 AM (48 w, 20 h)

Recent Activity

Tue, Sep 15

dancgr committed rGd417488ef5a6: [AArch64][SVE] Add lowering for llvm fsqrt (authored by Asif).
[AArch64][SVE] Add lowering for llvm fsqrt
Tue, Sep 15, 12:29 PM
dancgr closed D87707: [AArch64][SVE] Add lowering for llvm fsqrt.
Tue, Sep 15, 12:29 PM · Restricted Project

Fri, Sep 4

dancgr committed rG1ffcbe35ae0e: [AArch64][SVE] Add lowering for rounding operations (authored by Asif).
[AArch64][SVE] Add lowering for rounding operations
Fri, Sep 4, 8:18 AM
dancgr closed D86793: [AArch64][SVE] Add lowering for rounding operations.
Fri, Sep 4, 8:18 AM · Restricted Project

Wed, Sep 2

dancgr committed rGec489ae048fd: [IPSCCP] Fix a bug that the "returned" attribute is not cleared when function… (authored by congzhe).
[IPSCCP] Fix a bug that the "returned" attribute is not cleared when function…
Wed, Sep 2, 8:23 AM
dancgr closed D84220: [IPSCCP] Fix a bug that the "returned" attribute is not cleared when function is optimized to return undef.
Wed, Sep 2, 8:23 AM · Restricted Project, Restricted Project

Wed, Aug 26

dancgr committed rGfd536eeed99e: [AArch64][SVE] Add lowering for llvm fceil (authored by Asif).
[AArch64][SVE] Add lowering for llvm fceil
Wed, Aug 26, 1:01 PM
dancgr closed D84548: [AArch64][SVE] Add lowering for llvm fceil.
Wed, Aug 26, 1:01 PM · Restricted Project

Jul 13 2020

dancgr abandoned D83045: [AArch64][SVE] Add FP unpredicated to predicated two-op codegen.
Jul 13 2020, 11:04 AM · Restricted Project

Jul 2 2020

dancgr created D83045: [AArch64][SVE] Add FP unpredicated to predicated two-op codegen.
Jul 2 2020, 6:26 AM · Restricted Project

Jun 9 2020

dancgr committed rG4dcc0d1958f8: [CodeGen][SVE] Avoid scalarizing zero splat stores on scalable vectors. (authored by hkao13).
[CodeGen][SVE] Avoid scalarizing zero splat stores on scalable vectors.
Jun 9 2020, 10:26 AM
dancgr closed D80824: [CodeGen][SVE] Avoid scalarizing zero splat stores on scalable vectors..
Jun 9 2020, 10:26 AM · Restricted Project

Jun 3 2020

dancgr committed rGc57e41c000c4: [CodeGen][SVE] Replace deprecated calls in getCopyFromPartsVector() (authored by hkao13).
[CodeGen][SVE] Replace deprecated calls in getCopyFromPartsVector()
Jun 3 2020, 8:45 AM
dancgr closed D80826: [CodeGen][SVE] Replace deprecated calls in getCopyFromPartsVector().
Jun 3 2020, 8:45 AM · Restricted Project

May 29 2020

dancgr abandoned D80817: [CodeGen] Fix warning in SelectionDAG getNode for EXTRACT_VECTOR_ELT.

@efriedma Thanks Eli, I will close it, as that other patch already fixed that issue.

May 29 2020, 12:00 PM · Restricted Project
dancgr committed rGb637519eef01: [SVE] Replace deprecated call in changeVectorElementTypeToInteger (authored by bas).
[SVE] Replace deprecated call in changeVectorElementTypeToInteger
May 29 2020, 10:54 AM
dancgr closed D80746: [SVE] Replace deprecated call in changeVectorElementTypeToInteger.
May 29 2020, 10:54 AM · Restricted Project
dancgr created D80817: [CodeGen] Fix warning in SelectionDAG getNode for EXTRACT_VECTOR_ELT.
May 29 2020, 10:21 AM · Restricted Project
dancgr added a reviewer for D80817: [CodeGen] Fix warning in SelectionDAG getNode for EXTRACT_VECTOR_ELT: bas.
May 29 2020, 10:21 AM · Restricted Project

May 28 2020

dancgr added a comment to D80555: [CodeGen] Fix warning in changeVectorElementTypeToInteger.

Hello David, I have this patch here that I was going to upstream (https://reviews.llvm.org/D80746), but I just realized that it is exactly the same as this one.

May 28 2020, 2:52 PM · Restricted Project

Mar 5 2020

dancgr committed rGeae228a292f5: [IndVarSimplify] Extend previous special case for load use instruction to any… (authored by zhongduo).
[IndVarSimplify] Extend previous special case for load use instruction to any…
Mar 5 2020, 1:45 PM
dancgr closed D73059: [IndVarSimplify] Extend previous special case for load use instruction to any narrow type loop variant to avoid extra trunc instruction.
Mar 5 2020, 1:45 PM · Restricted Project

Feb 27 2020

dancgr added a comment to D75197: [AArch64][SVE] Add intrinsics for bitwise permute instructions.

Thanks for the patch @dancgr but these intrinsics have already been implemented in D74912. @sdesmalen shared a spreadsheet [1] with the mailing list to coordinate the intrinsics upstreaming, it's probably not as useful now given they're almost all implemented but you might find it useful if you haven't seen it already.

[1] https://docs.google.com/spreadsheets/d/1leug3a0eHhi_bWtKJOR0MeZHvfQLoIPtP-um7AWafRM

Feb 27 2020, 7:05 AM · Restricted Project
dancgr abandoned D75197: [AArch64][SVE] Add intrinsics for bitwise permute instructions.
Feb 27 2020, 7:03 AM · Restricted Project

Feb 26 2020

dancgr added inline comments to D75197: [AArch64][SVE] Add intrinsics for bitwise permute instructions.
Feb 26 2020, 10:34 AM · Restricted Project
dancgr created D75197: [AArch64][SVE] Add intrinsics for bitwise permute instructions.
Feb 26 2020, 10:34 AM · Restricted Project

Feb 21 2020

dancgr added a comment to D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.

Latest commit adds a change to the failing MC tests to be exactly the same as the MC tests for eor3 and bcax.

Feb 21 2020, 9:28 AM · Restricted Project
dancgr committed rGdb9c40f5624e: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations (authored by dancgr).
[AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations
Feb 21 2020, 9:19 AM
dancgr closed D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.
Feb 21 2020, 9:19 AM · Restricted Project
dancgr reopened D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.

Will look into that and update this review with the necessary changes.

Feb 21 2020, 8:33 AM · Restricted Project

Feb 20 2020

dancgr committed rGce70e2899879: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations (authored by dancgr).
[AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations
Feb 20 2020, 8:30 AM
dancgr closed D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.
Feb 20 2020, 8:30 AM · Restricted Project

Feb 19 2020

dancgr updated the diff for D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.

Merging all instructions into same multiclass.

Feb 19 2020, 10:37 AM · Restricted Project

Feb 18 2020

dancgr added inline comments to D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.
Feb 18 2020, 3:15 PM · Restricted Project
dancgr added inline comments to D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.
Feb 18 2020, 1:49 PM · Restricted Project
dancgr created D74785: [AArch64][SVE] Add intrinsics for SVE2 bitwise ternary operations.
Feb 18 2020, 12:08 PM · Restricted Project

Feb 12 2020

dancgr committed rGfc8d033e9663: [AArch64][SVE] Add addsub carry long instrinsics (authored by dancgr).
[AArch64][SVE] Add addsub carry long instrinsics
Feb 12 2020, 7:46 AM
dancgr closed D74328: [AArch64][SVE] Add addsub carry long instrinsics.
Feb 12 2020, 7:46 AM · Restricted Project

Feb 10 2020

dancgr created D74328: [AArch64][SVE] Add addsub carry long instrinsics.
Feb 10 2020, 8:16 AM · Restricted Project

Jan 31 2020

dancgr committed rG44a4f5fc6a5a: [AArch64][SVE] Add SVE2 mla unpredicated intrinsics. (authored by dancgr).
[AArch64][SVE] Add SVE2 mla unpredicated intrinsics.
Jan 31 2020, 8:48 AM
dancgr closed D73746: [AArch64][SVE] Add SVE2 mla unpredicated intrinsics..
Jan 31 2020, 8:47 AM · Restricted Project
dancgr added a comment to D73746: [AArch64][SVE] Add SVE2 mla unpredicated intrinsics..

Thanks for these changes, @dancgr! I just have a couple of comments on the tests in sve2-mla-unpredicated.ll

Jan 31 2020, 7:50 AM · Restricted Project
dancgr updated the diff for D73746: [AArch64][SVE] Add SVE2 mla unpredicated intrinsics..

Add missing i16 tests.

Jan 31 2020, 7:40 AM · Restricted Project

Jan 30 2020

dancgr created D73746: [AArch64][SVE] Add SVE2 mla unpredicated intrinsics..
Jan 30 2020, 2:20 PM · Restricted Project
dancgr committed rG0610637aac9c: [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics. (authored by dancgr).
[AArch64][SVE] Add remaining SVE2 mla indexed intrinsics.
Jan 30 2020, 10:31 AM
dancgr closed D73633: [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics..
Jan 30 2020, 10:30 AM · Restricted Project

Jan 29 2020

dancgr updated the summary of D73633: [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics..
Jan 29 2020, 1:40 PM · Restricted Project
dancgr added a comment to D73633: [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics..

@sdesmalen Hopefully all comments from D73576 were addressed with this patch.

Jan 29 2020, 8:35 AM · Restricted Project
dancgr created D73633: [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics..
Jan 29 2020, 8:25 AM · Restricted Project
dancgr added a comment to D73576: [AArch64][SVE] Add SVE2 mla indexed intrinsics.

I will make the changes suggested by Sander in a following patch, joined with the saturating multiply-add long intirnsics.

Jan 29 2020, 7:21 AM · Restricted Project

Jan 28 2020

dancgr committed rG1f85dfb2af1a: [AArch64][SVE] Add SVE2 mla indexed intrinsics. (authored by dancgr).
[AArch64][SVE] Add SVE2 mla indexed intrinsics.
Jan 28 2020, 2:16 PM
dancgr closed D73576: [AArch64][SVE] Add SVE2 mla indexed intrinsics.
Jan 28 2020, 2:15 PM · Restricted Project
dancgr retitled D73576: [AArch64][SVE] Add SVE2 mla indexed intrinsics from [AArch64][SVE] Add SVE2 mla indexed intrinsics. to [AArch64][SVE] Add SVE2 mla indexed intrinsics.
Jan 28 2020, 1:22 PM · Restricted Project
dancgr added a reviewer for D73576: [AArch64][SVE] Add SVE2 mla indexed intrinsics: kmclaughlin.
Jan 28 2020, 1:11 PM · Restricted Project
dancgr removed a reviewer for D73576: [AArch64][SVE] Add SVE2 mla indexed intrinsics: dancgr.
Jan 28 2020, 1:11 PM · Restricted Project
dancgr created D73576: [AArch64][SVE] Add SVE2 mla indexed intrinsics.
Jan 28 2020, 1:11 PM · Restricted Project

Jan 23 2020

dancgr committed rG58ceb81d318b: [SVE] Add SVE2 patterns for unpredicated multiply instructions (authored by dancgr).
[SVE] Add SVE2 patterns for unpredicated multiply instructions
Jan 23 2020, 10:28 AM
dancgr closed D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.
Jan 23 2020, 10:28 AM · Restricted Project

Jan 22 2020

dancgr added inline comments to D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.
Jan 22 2020, 10:42 AM · Restricted Project
dancgr updated the diff for D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.

Remove _m from intrinsics, as it is the default behaviour. Also, add unpredicated patterns for SVE2 smulh, umulh.

Jan 22 2020, 10:42 AM · Restricted Project

Jan 20 2020

dancgr added a comment to D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.

I'm not sure on some parts, but I have prepared a major update for this patch that I hope will fix most of @sdesmalen concerns.

Jan 20 2020, 8:35 AM · Restricted Project

Jan 16 2020

dancgr updated the diff for D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.

Tentative changes to address some comments from the reviewers.

Jan 16 2020, 11:49 AM · Restricted Project
dancgr added a comment to D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.

I'm not sure on some parts, but I have prepared a major update for this patch that I hope will fix most of @sdesmalen concerns.

Jan 16 2020, 11:39 AM · Restricted Project

Jan 15 2020

dancgr added a comment to D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.

Can we also also add mul patterns for targets that have SVE, but not SVE2?

That instruction is restricted to SVE2. Do we have unpredicated vector mul instructions for SVE targets as well?

We can synthesize a predicate using ptrue. We do this in a few places currently; for example, to implement bswap.

Jan 15 2020, 2:06 PM · Restricted Project
dancgr committed rG34ba96a3d49e: [NFC][IndVarSimplify] remove duplicate code in widenWithVariantLoadUseCodegen. (authored by zhongduo).
[NFC][IndVarSimplify] remove duplicate code in widenWithVariantLoadUseCodegen.
Jan 15 2020, 1:29 PM
dancgr closed D72652: [NFC][IndVarSimplify] remove duplicate code in widenWithVariantLoadUseCodegen.
Jan 15 2020, 1:29 PM · Restricted Project
dancgr added a comment to D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.

Can we also also add mul patterns for targets that have SVE, but not SVE2?

Jan 15 2020, 12:32 PM · Restricted Project
dancgr updated the summary of D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.
Jan 15 2020, 12:15 PM · Restricted Project
dancgr created D72799: [SVE] Add SVE2 patterns for unpredicated multiply instructions.
Jan 15 2020, 12:14 PM · Restricted Project

Jan 14 2020

dancgr committed rG26d96126a0d2: [SVE] Add patterns for MUL immediate instruction. (authored by dancgr).
[SVE] Add patterns for MUL immediate instruction.
Jan 14 2020, 12:32 PM
dancgr closed D72654: [SVE] Add patterns for MUL immediate instruction..
Jan 14 2020, 12:30 PM · Restricted Project
dancgr added inline comments to D72654: [SVE] Add patterns for MUL immediate instruction..
Jan 14 2020, 12:02 PM · Restricted Project
dancgr updated the diff for D72654: [SVE] Add patterns for MUL immediate instruction..

Fix whitespace errors and add a couple negative tests for invalid input.

Jan 14 2020, 11:12 AM · Restricted Project
dancgr added a comment to D72654: [SVE] Add patterns for MUL immediate instruction..

Do we have any negative tests, for immediates that are outside the range of the sve mul immediate instruction?

Jan 14 2020, 10:44 AM · Restricted Project

Jan 13 2020

dancgr created D72654: [SVE] Add patterns for MUL immediate instruction..
Jan 13 2020, 2:48 PM · Restricted Project
dancgr committed rG2d7e757a836a: [AArch64][SVE] Add patterns for some arith SVE instructions. (authored by dancgr).
[AArch64][SVE] Add patterns for some arith SVE instructions.
Jan 13 2020, 8:41 AM
dancgr closed D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.
Jan 13 2020, 8:41 AM · Restricted Project

Jan 9 2020

dancgr updated subscribers of D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.

@efriedma Any other remarks on this patch?

Jan 9 2020, 1:04 PM · Restricted Project

Jan 7 2020

dancgr updated the diff for D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.

Updated some minor changes.

Jan 7 2020, 8:39 AM · Restricted Project

Jan 6 2020

dancgr added inline comments to D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.
Jan 6 2020, 6:51 AM · Restricted Project

Dec 27 2019

dancgr committed rG2abda66848e5: [NFC][DA] Remove duplicate code in checkSrcSubscript and checkDstSubscript (authored by dancgr).
[NFC][DA] Remove duplicate code in checkSrcSubscript and checkDstSubscript
Dec 27 2019, 7:08 AM
dancgr closed D71087: [NFC][DA] Remove duplicate code in checkSrcSubscript and checkDstSubscript.
Dec 27 2019, 7:08 AM · Restricted Project

Dec 23 2019

dancgr updated the diff for D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.

Update to use default ISD:SMAX variety.

Dec 23 2019, 12:23 PM · Restricted Project
dancgr added a comment to D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.

Wong SMAX; you're referring to VECREDUCE_SMAX, which isn't relevant here. There is no IR intrinsic for ISD::SMAX; it's pattern-matched from select instructions.

Dec 23 2019, 12:23 PM · Restricted Project
dancgr added a comment to D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.

As far as I know the ISD::SMAX only takes one input (https://llvm.org/docs/LangRef.html#llvm-experimental-vector-reduce-smax-intrinsic), in this case we need two inputs so we can do the max between the input vector and the immediate value.

Dec 23 2019, 7:07 AM · Restricted Project

Dec 20 2019

dancgr created D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.
Dec 20 2019, 11:11 AM · Restricted Project
dancgr retitled D71779: [AArch64][SVE] Add patterns for signed and unsigned min/max instructions from [AArch64][SVE] Add patterns for some int arith instructions to [AArch64][SVE] Add patterns for signed and unsigned min/max instructions.
Dec 20 2019, 11:11 AM · Restricted Project
dancgr committed rG15bfd2cd5438: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant (authored by dancgr).
[AArch64][SVE] Replace integer immediate intrinsics with splat vector variant
Dec 20 2019, 10:51 AM
dancgr closed D71614: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant.
Dec 20 2019, 10:51 AM · Restricted Project
dancgr added inline comments to D70450: [AArch64] Teach Load/Store optimizier to rename store operands for pairing..
Dec 20 2019, 10:29 AM · Restricted Project

Dec 18 2019

dancgr requested review of D71614: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant.

For llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll it is still not performing the dag combine, however the resulting assembly is different because this matches with the new AArch64dup pattern for logical vector and immediate AND.

Dec 18 2019, 11:45 AM · Restricted Project
dancgr updated the diff for D71614: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant.

Fix issues with sve gather scatter test.

Dec 18 2019, 11:45 AM · Restricted Project
dancgr reopened D71614: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant.
Dec 18 2019, 11:45 AM · Restricted Project
dancgr committed rGc7abf8841187: Revert "[AArch64][SVE] Replace integer immediate intrinsics with splat vector… (authored by dancgr).
Revert "[AArch64][SVE] Replace integer immediate intrinsics with splat vector…
Dec 18 2019, 11:16 AM
dancgr added a reverting change for rG830e08b98bcb: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant: rGc7abf8841187: Revert "[AArch64][SVE] Replace integer immediate intrinsics with splat vector….
Dec 18 2019, 11:16 AM
dancgr added a reverting change for rGeb1857ce0da4: [AArch64][SVE] Fix gather scatter dag combine test.: rGc7abf8841187: Revert "[AArch64][SVE] Replace integer immediate intrinsics with splat vector….
Dec 18 2019, 11:16 AM
dancgr added a comment to D71614: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant.

All changes reverted by commit c7abf8841187c6e2c4169c06226429cdd5650e7f.

Dec 18 2019, 11:16 AM · Restricted Project
dancgr added a comment to D71614: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant.

This https://reviews.llvm.org/rGeb1857ce0da481caf82271e6d0c9fc745dfab26f fixes this error for now.

Dec 18 2019, 10:45 AM · Restricted Project
dancgr committed rGeb1857ce0da4: [AArch64][SVE] Fix gather scatter dag combine test. (authored by dancgr).
[AArch64][SVE] Fix gather scatter dag combine test.
Dec 18 2019, 10:38 AM
dancgr committed rG830e08b98bcb: [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant (authored by dancgr).
[AArch64][SVE] Replace integer immediate intrinsics with splat vector variant
Dec 18 2019, 10:19 AM