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csstormq (Xiaoqiang Xu)
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Jun 5 2022, 11:28 PM (10 w, 18 h)

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Jul 4 2022

csstormq added a comment to D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.

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Jul 4 2022, 11:16 PM · Restricted Project, Restricted Project

Jul 3 2022

csstormq added a comment to D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.

Thanks, @Eli.

Jul 3 2022, 7:39 PM · Restricted Project, Restricted Project

Jun 17 2022

csstormq updated the diff for D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.
  1. move virtual functions into TargetMachine
Jun 17 2022, 4:39 AM · Restricted Project, Restricted Project
csstormq added inline comments to D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.
Jun 17 2022, 4:25 AM · Restricted Project, Restricted Project

Jun 14 2022

csstormq updated the diff for D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.

Eliminate the duplicate loop over memory operands.

Jun 14 2022, 11:53 PM · Restricted Project, Restricted Project
csstormq added inline comments to D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.
Jun 14 2022, 11:52 PM · Restricted Project, Restricted Project

Jun 10 2022

csstormq updated the diff for D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.

Addressing code review comments.

Jun 10 2022, 5:57 AM · Restricted Project, Restricted Project
csstormq added inline comments to D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.
Jun 10 2022, 5:54 AM · Restricted Project, Restricted Project

Jun 7 2022

csstormq added a comment to D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.

You might want to look at TargetSubtargetInfo::useAA() and TargetSubtargetInfo::enableMachineScheduler(); might be helpful for your target, depending on what you're doing. (Actually, maybe we should consider just turning these on by default for all targets, given the number of targets overriding them.)

Jun 7 2022, 9:18 PM · Restricted Project, Restricted Project
csstormq updated the diff for D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.
Jun 7 2022, 9:17 PM · Restricted Project, Restricted Project

Jun 6 2022

csstormq added a comment to D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.

Most of the existing target-independent code related to memoperand aliasing is in MachineInstr::mayAlias (specifically the MemOperandsHaveAlias helper). Is there some reason you can't just extend that?

Jun 6 2022, 7:28 PM · Restricted Project, Restricted Project
csstormq requested review of D127095: [llvm][CodeGen] Add a default implementation to check whether two memory accesses are trivially disjoint.
Jun 6 2022, 3:17 AM · Restricted Project, Restricted Project