Page MenuHomePhabricator

alexandre.isoard (Alexandre Isoard)
User

Projects

User does not belong to any projects.

User Details

User Since
Dec 15 2016, 10:51 AM (139 w, 5 d)

Recent Activity

Mon, Aug 12

alexandre.isoard added a comment to D66029: llvm-canon.

Seems like a great idea!

Mon, Aug 12, 3:46 PM · Restricted Project

May 7 2019

alexandre.isoard added a comment to D61634: [clang/llvm] Allow efficient implementation of libc's memory functions in C/C++.

I'm not convinced by the approach.

May 7 2019, 11:37 PM · Restricted Project, Restricted Project

Feb 4 2019

alexandre.isoard accepted D54978: Move the SMT API to LLVM.

Looks good.

Feb 4 2019, 8:10 PM · Restricted Project, Restricted Project

Nov 30 2018

alexandre.isoard requested changes to D54978: Move the SMT API to LLVM.

We indeed have a user of Z3 for LLVM coming soon. (it is not upstreamed yet because the binding with Z3 was botched, it would never have been accepted)
We wrote a more aggressive SCEV Canonicalizer, as a support class. It does not rely on Z3 to perform the transformation itself, but it uses Z3 into the verifier. (mostly to find potential mistakes, but we could use it to find missed opportunities too)

Nov 30 2018, 6:58 PM · Restricted Project, Restricted Project

Nov 28 2018

alexandre.isoard accepted D54978: Move the SMT API to LLVM.

Great! I have some use cases for verifiers, and in general for research purposes it can be quite useful.

Nov 28 2018, 8:49 PM · Restricted Project, Restricted Project

Jun 20 2018

alexandre.isoard added a comment to D48338: [SCEV] Improve zext(A /u B) and zext(A % B).

Though I can't easily reduce to a test case, the code I'm specifically looking at looks like the following:

%11 = udiv i32 %10, 112
%12 = mul i32 %11, 112
%13 = sub i32 %10, %12
%14 = urem i32 %11, 112
%15 = udiv i32 %10, 12544
%16 = zext i32 %15 to i64
%17 = zext i32 %14 to i64
%18 = zext i32 %13 to i64
%19 = getelementptr inbounds [128 x [112 x [112 x [64 x float]]]], [128 x [112 x [112 x [64 x float]]]] addrspace(1)* %ptr, i64 0, i64 %16, i64 %17, i64 %18, i64 %3

The idea is that %10 is a flat index of %ptr, and the whole GEP should be equivalent to (in C) &%ptr[%10]. This already works for a case where there is no zexts and everything is i32. This patch makes it work with zexts.

Jun 20 2018, 7:08 PM
alexandre.isoard added a comment to D48338: [SCEV] Improve zext(A /u B) and zext(A % B).

That might be related, for instance, such expressions:

Jun 20 2018, 5:00 PM
alexandre.isoard added a comment to D48338: [SCEV] Improve zext(A /u B) and zext(A % B).

It transforms: (sext i57 (199 * (trunc i64 (-1 + (2780916192016515319 * %n)) to i57)) to i64) into (sext i57 (-199 + (trunc i64 %n to i57)) to i64) (not sure if that is correct).

Jun 20 2018, 11:17 AM
alexandre.isoard added a comment to D48338: [SCEV] Improve zext(A /u B) and zext(A % B).

What about zext(%a + %b) + %c? I think zext(%a) + zext(%b) + %c is in a much better state than, idk, zext(%a + %b + trunc(%c)).

Jun 20 2018, 10:14 AM

Jun 19 2018

alexandre.isoard added a comment to D48338: [SCEV] Improve zext(A /u B) and zext(A % B).

Ah, you are right, I misinterpreted the purpose.

Jun 19 2018, 10:53 PM
alexandre.isoard added a comment to D48338: [SCEV] Improve zext(A /u B) and zext(A % B).

I have been working on related issue but my strategy is different:

Jun 19 2018, 4:56 PM

Mar 7 2018

alexandre.isoard updated the diff for D44244: [LLVM] Add -git-commit-after-all option.

Fixed RUN_ON macro typo

Mar 7 2018, 8:10 PM · Restricted Project
alexandre.isoard added a reviewer for D44244: [LLVM] Add -git-commit-after-all option: asb.
Mar 7 2018, 7:36 PM · Restricted Project
alexandre.isoard created D44244: [LLVM] Add -git-commit-after-all option.
Mar 7 2018, 7:31 PM · Restricted Project

Aug 28 2017

alexandre.isoard added a comment to D34598: ScalarEvolution: Add URem support.

Hello, is there any modifications I didn't apply or do you have any change you would like to see?

Aug 28 2017, 11:46 AM

Aug 16 2017

alexandre.isoard updated the diff for D34598: ScalarEvolution: Add URem support.

Updated the test cases and simplified the power-of-two special case.

Aug 16 2017, 3:24 AM

Aug 15 2017

alexandre.isoard requested review of D34598: ScalarEvolution: Add URem support.

Please check I didn't introduce new errors (off by one?).

Aug 15 2017, 9:40 AM
alexandre.isoard updated the diff for D34598: ScalarEvolution: Add URem support.

I added handling for urem by a power-of-two so as to fix the failing test-case.

Aug 15 2017, 9:32 AM

Jun 28 2017

alexandre.isoard added inline comments to D34598: ScalarEvolution: Add URem support.
Jun 28 2017, 11:38 AM
alexandre.isoard updated the diff for D34598: ScalarEvolution: Add URem support.

Fixed the short-circuit. (should be 0, not x)

Jun 28 2017, 11:36 AM
alexandre.isoard updated the diff for D34598: ScalarEvolution: Add URem support.

Updated testcase, outlined into a getURemExpr and added a x urem 1 shortcut.

Jun 28 2017, 11:25 AM
alexandre.isoard added inline comments to D34598: ScalarEvolution: Add URem support.
Jun 28 2017, 11:11 AM
alexandre.isoard added inline comments to D34598: ScalarEvolution: Add URem support.
Jun 28 2017, 7:55 AM
alexandre.isoard updated the diff for D34598: ScalarEvolution: Add URem support.

Added an additional testcase with a loop.

Jun 28 2017, 4:27 AM

Jun 24 2017

alexandre.isoard created D34598: ScalarEvolution: Add URem support.
Jun 24 2017, 11:52 AM

Dec 15 2016

alexandre.isoard added a reviewer for D27820: Add isl_multi_pw_aff to GICHelper: grosser.
Dec 15 2016, 11:00 AM
alexandre.isoard retitled D27820: Add isl_multi_pw_aff to GICHelper from to Add isl_multi_pw_aff to GICHelper.
Dec 15 2016, 10:58 AM