- User Since
- Apr 19 2017, 12:39 AM (173 w, 1 d)
Sep 19 2017
I agree, it is a really 'disgusting' hack at this point.
- So the reason lld is used instead of ld is simply that I do not know and have not been able to test if ld works. The AMDGPU backend documentation here specifically mentions lld, so I felt like that was the safest bet. But you are absolutely right, if ld works, that is the better default.
Thank you both for the review!
Sep 11 2017
Sep 6 2017
- Improved temporary file handling.
- Fixed error in test case
Sep 3 2017
- Updated test cases to reflect changes and fixed formatting
Aug 27 2017
Was committed with https://llvm.org/svn/llvm-project/polly/trunk@311848 91177308-0d34-0410-b5e6-96231b3b80d8
Not a problem, thanks for reacting so quickly! :-)
Aug 19 2017
Thank you for the quick fix! I can confirm that it works.
Jul 21 2017
Rebase for commit
Ping do the latest changes address your concerns @singam-sanjay ? Can I land this?
Jul 17 2017
Removed left over debug print, moved SPIR creation into createASM, fixed minor issues addressed in comments.
Jul 16 2017
Will address the points mentioned asap. As for your SPIR-V question: The goal, should that back-end be added, would be to add SPIR-V compilation as an additional GPU target option (In the future). This would allow kernel execution on any SPIR-V supporting target device. This SPIR solution is essentially a 'quickfix' to get it to work on Intel, as long as SPIR-V is not an option.
Jul 14 2017
- Added testcase for SPIR
- Fixed naming inconsistencies
Jul 11 2017
I am not yet too familiar with how to implement such a case and what exactly to check for, but if that is desired, I can look into it.
- Removed compile-conditional CMake dependency
- Removed Regexp hack
- Added comment clarification for workaround.
- Inserting SPIR barriers with custom function.
Jul 10 2017
- Adapted dynamic method loading for intel
Jul 9 2017
May 10 2017
May 9 2017
Added constant identifier and mor idiomatic ArgSizes vector initialization
I personally find it better like this, because the i is per-loop, so it is self contained in every iteration, the Index however is across loops. To me, this way it is more clear, that the Index is not a loop-specific iteration variable.
Let's see what the others think though. Either way, I would suggest moving that to a different patch indeed, should we decide on changing that.
May 8 2017
- Addressed some comments.
Fixed wrong device queue error
May 7 2017
Reopened for rebase
May 4 2017
- Introduced PPCGCodeGeneration header file for simplicity
Addressed most of your concerns. @grosser it should be ready now, what do you think?
May 2 2017
- Fixed formatting
- Addressed multiple issues pointed out in comment
- Fixed formatting and managed-memory test case (including pre-existing bug)
May 1 2017
Apr 30 2017
- Integrated D32226 - Managed memory support
Apr 29 2017
- GPURuntime works on systems with just one of CUDA/OpenCL now.
Apr 27 2017
- Fixed enum style to C++11
Apr 26 2017
- Made CUDA Runtime default, fixed formatting, adapted test case
- Addressed consistency and naming concerns
Apr 25 2017
Looking into the rest of your comments.
- Removed left over commented out macros
- Stylistic changes and switch to -polly-gpu-runtime=cuda/opencl compiler flag
@bollu ping: I would love it if you could commit this change please ;-)
Apr 24 2017
- Replaced magic numbers, added assertions and fixed if-braces.
Reverted unnecessary datalayout changes in tests.
Removed magic constant in favor of more doc-friendly 'explanatory-constant'.
Apr 23 2017
@jlebar From what I understand, NVPTX only marks a kernel argument as .global if its address space in the IR has been marked with addrspace(1), and said conversion to global address space would then take place inside the kernel, instead of marking the argument itself with .global. Am I wrong on this?
Apr 22 2017
Updated tests to fit address space changes and correct NVPTX data layout.
Apr 20 2017
Using the modified Polybench/C I can confirm that it's working. When respecting those necessary changes, this patch looks good to me.