llvm-exegesis Analysis Results

Sched Class ADC16mi_ADC16mi8_ADC32mi_ADC32mi8_ADC64mi32_ADC64mi8_ADC8mi_ADC8mi8_SBB16mi_SBB16mi8_SBB32mi_SBB32mi8_SBB64mi32_SBB64mi8_SBB8mi_SBB8mi8 contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class ADC8mr_ADC16mr_ADC32mr_ADC64mr_SBB8mr_SBB16mr_SBB32mr_SBB64mr contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class ADD16mi_ADD16mi8_ADD16mr_ADD32mi_ADD32mi8_ADD32mr_ADD64mi32_ADD64mi8_ADD64mr_ADD8mi_ADD8mi8_ADD8mr_SUB16mi_SUB16mi8_SUB16mr_SUB32mi_SUB32mi8_SUB32mr_SUB64mi32_SUB64mi8_SUB64mr_SUB8mi_SUB8mi8_SUB8mr contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class ADD_FI16m_ADD_FI32m_SUBR_FI16m_SUBR_FI32m_SUB_FI16m_SUB_FI32m contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class AND16mi_AND16mi8_AND16mr_AND32mi_AND32mi8_AND32mr_AND64mi32_AND64mi8_AND64mr_AND8mi_AND8mi8_AND8mr_OR16mi_OR16mi8_OR16mr_OR32mi_OR32mi8_OR32mr_OR32mrLocked_OR64mi32_OR64mi8_OR64mr_OR8mi_OR8mi8_OR8mr_XOR16mi_XOR16mi8_XOR16mr_XOR32mi_XOR32mi8_XOR32mr_XOR64mi32_XOR64mi8_XOR64mr_XOR8mi_XOR8mi8_XOR8mr contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteSystem contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteBitTestSetImmRMW contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteBitTestSetRegRMW contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class CLD contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class InvalidSchedClass contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class COS_F_COS_Fp32_COS_Fp64_COS_Fp80_SIN_F_SIN_Fp32_SIN_Fp64_SIN_Fp80 contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class CPUID contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteCRC32Ld_ReadAfterLd contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteCvtI2SDLd contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteCvtI2SDLd_ReadAfterVecLd contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteCvtI2SSLd contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteCvtI2SSLd_ReadAfterVecLd contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class CWD contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class DEC16m_DEC32m_DEC64m_DEC8m_INC16m_INC32m_INC64m_INC8m_NEG16m_NEG32m_NEG64m_NEG8m_NOT16m_NOT32m_NOT64m_NOT8m contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class DIVR_FI16m_DIVR_FI32m contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class DIVR_FI16m_DIVR_FI32m_DIV_FI16m_DIV_FI32m contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class WriteDPPSLd_ReadAfterVecXLd contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class F2XM1 contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data:

Sched Class FBLDm contains instructions whose performance characteristics do not match that of LLVM:

llvm SchedModel data: