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Thu, Oct 17

apazos added a comment to D62190: [RISCV] Allow shrink wrapping for RISC-V.

Lewis, I am not seeing any code change.

Thu, Oct 17, 3:25 PM · Restricted Project
apazos added a comment to D68979: [RISCV] Handle variable sized objects with the stack need to be realigned.

Shiva, I have tried a few workloads like EEMBC, SPEC2000/2006, perennial c++, plumhall.
They don't seem to use variable length arrays nor allocas to test this patch.
Which test suite are you using?

Thu, Oct 17, 3:06 PM · Restricted Project
apazos added a comment to D68979: [RISCV] Handle variable sized objects with the stack need to be realigned.

Hi Shiva, I will evaluate your patch today and report back.

Thu, Oct 17, 8:40 AM · Restricted Project
apazos added a comment to D68644: [RISCV] Prevent unsafe shrink wrapping with save/restore enabled.

Thanks Lewis, I applied this patch with its dependencies, ran -msave-restore -mllvm -enable-shrink-wrap config, and I see no failures.

Thu, Oct 17, 8:40 AM · Restricted Project
apazos added a comment to D62190: [RISCV] Allow shrink wrapping for RISC-V.

Thanks Lewis, I applied the patch and I am not detecting any new failure with this feature.

Thu, Oct 17, 8:40 AM · Restricted Project

Wed, Oct 16

apazos added a comment to D62190: [RISCV] Allow shrink wrapping for RISC-V.

Lewis, this patch is not applying clean on top of https://reviews.llvm.org/D62686. Can you please rebase?

Wed, Oct 16, 10:11 PM · Restricted Project
apazos added inline comments to D68685: [RISCV] Scheduler description for Rocket Core.
Wed, Oct 16, 5:37 PM · Restricted Project
apazos added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

Thanks Lewis, the runs are looking good, no failures, and good code size savings (average 3%)

Wed, Oct 16, 2:06 PM · Restricted Project, Restricted Project

Tue, Oct 15

apazos updated the diff for D68290: [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes().

Added check to verify whether MI is parentless or not because isCompressible call depends of function/module info.

Tue, Oct 15, 12:23 PM · Restricted Project
apazos added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

Is it worth trying to disallow tail call optimization completely if this flag is enabled? I'm not sure what GCC does exactly. but this seems to be the behaviour.

Tue, Oct 15, 11:35 AM · Restricted Project, Restricted Project

Mon, Oct 14

apazos added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

Yes Eli thanks for pointing out there are more scenarios that can fail.
It looks like the best solution is to permit both flags on, but then bail out from doing this transformation if there is any type of tail call already in the function.
This way we avoid messing with reverting tail calls back to regular calls.

Mon, Oct 14, 5:28 PM · Restricted Project, Restricted Project
apazos added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

Here is the bugpoint-reduced test case for the SPEC failure when enabling -msave-restore and allowing tail calls:

Mon, Oct 14, 4:00 PM · Restricted Project, Restricted Project

Thu, Oct 10

apazos updated subscribers of D62190: [RISCV] Allow shrink wrapping for RISC-V.
Thu, Oct 10, 8:21 AM · Restricted Project

Mon, Oct 7

apazos added a comment to D66210: [RISCV] Enable the machine outliner for RISC-V.

Lewis, this patch LGTM. You can go ahead and merge it.

Mon, Oct 7, 1:57 PM · Restricted Project
apazos retitled D68290: [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes() from [RISCV] WIP better estimate size of outlined block with C extension enabled to [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes().
Mon, Oct 7, 1:53 PM · Restricted Project
apazos updated the diff for D68290: [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes().
Mon, Oct 7, 1:52 PM · Restricted Project

Fri, Oct 4

apazos committed rGea835f5ce841: [RISCV] Added missing ImmLeaf predicates (authored by apazos).
[RISCV] Added missing ImmLeaf predicates
Fri, Oct 4, 4:46 PM
apazos committed rL373812: [RISCV] Added missing ImmLeaf predicates.
[RISCV] Added missing ImmLeaf predicates
Fri, Oct 4, 4:40 PM
apazos added inline comments to D68290: [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes().
Fri, Oct 4, 3:51 PM · Restricted Project

Thu, Oct 3

apazos added inline comments to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.
Thu, Oct 3, 9:01 PM · Restricted Project, Restricted Project
apazos added a comment to D62190: [RISCV] Allow shrink wrapping for RISC-V.

There are some additional perennial test suite failures when applying this patch and enabling -mllvm -enable-shrink-wrap.
When Lewis updates the patch to be standalone, we can verify it again.

Thu, Oct 3, 3:18 PM · Restricted Project
apazos added a comment to D68290: [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes().

Thanks Alex and Lewis.
I will break the patch in 3 commits:

  1. fix missing ImmLeaf predicate, which I will merge directly (no review).
  2. Compress Instr table gen back end changes. I will post this patch for review.
  3. Modify getInstSizeInBytes to invoke isCompressibleInst (thanks for the name fix!). This one I will run a few more correctness tests, and then post for review.
Thu, Oct 3, 10:16 AM · Restricted Project

Wed, Oct 2

apazos added inline comments to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.
Wed, Oct 2, 8:07 PM · Restricted Project, Restricted Project
apazos added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

Lewis, with this patch we see less failures. But still some tests in SPEC and perennial test suites are failing.

Wed, Oct 2, 2:55 PM · Restricted Project, Restricted Project

Tue, Oct 1

apazos added a comment to D66210: [RISCV] Enable the machine outliner for RISC-V.

Hi Lewis,
Here is the change: https://reviews.llvm.org/D68290
With this change I was able to remove the code size degradation I had observed.
Please try it out.

Tue, Oct 1, 4:03 PM · Restricted Project
apazos added a comment to D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls.

Thanks for the patch update. I will launch some new correctness runs.

Tue, Oct 1, 12:47 PM · Restricted Project, Restricted Project
apazos updated subscribers of D68290: [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes().
Tue, Oct 1, 12:45 PM · Restricted Project
apazos created D68290: [RISCV] Added isCompressibleInst() to estimate size in getInstSizeInBytes().
Tue, Oct 1, 12:45 PM · Restricted Project

Thu, Sep 26

apazos added a comment to D66210: [RISCV] Enable the machine outliner for RISC-V.

I have run a couple of standard workloads like SPEC.
There is no correctness issue when enabling the MO feature (except for spec2000/twolf which fails with/without MO).
The MO code size gains without compression are up to 7%. With compression enabled, most of the code size gain is gone, and I see more code size increase.
It is possible it has to do with the SequenceSize we are estimating.
The reason we enable compression late is to have all paths - coming from codegen (LLVM IR), parsing, assembling .s or inline asm - go through the same mechanism for compression.
This is similar/compatible with GCC behavior, which relies on the external assembler to implement compression.
We can better estimate SequenceSize by checking if an instruction is compressable. We can modify the tablegen backend for compression emitter to generate a function that does the isCompressable check, but instead of using MCInst and MCOperands for the checks, we need to use MachineInstr and MachineOperand types. I will try this solution. Another alternative is to compress LLVM IR code before running the machine outliner.

Thu, Sep 26, 8:06 AM · Restricted Project

Aug 12 2019

apazos added inline comments to D65950: [RISCV] Add Option for Printing Architectural Register Names.
Aug 12 2019, 2:52 PM · Restricted Project
apazos added a comment to D66081: [RISCV] Fix ICE in isDesirableToCommuteWithShift.

Thanks Sam, LGTM.

Aug 12 2019, 2:44 PM · Restricted Project

Aug 9 2019

apazos updated subscribers of D64425: [RISCV] Fix ICE in isDesirableToCommuteWithShift.
Aug 9 2019, 12:14 PM · Restricted Project

Mar 28 2019

apazos added inline comments to D57493: [RISCV] Put data smaller than eight bytes to small data section.
Mar 28 2019, 5:01 PM · Restricted Project

Mar 27 2019

apazos added inline comments to D57497: [RISCV] Passing small data limitation value to RISCV backend.
Mar 27 2019, 1:59 PM · Restricted Project

Mar 20 2019

apazos added inline comments to D59592: [RISCV] support ilp32e Calling Convention.
Mar 20 2019, 3:33 PM · Restricted Project
apazos added a comment to D59470: [RISCV] Add basic RV32E definitions and MC layer support.

Thanks Alex, LGTM

Mar 20 2019, 2:56 PM · Restricted Project
apazos added inline comments to D59470: [RISCV] Add basic RV32E definitions and MC layer support.
Mar 20 2019, 2:52 PM · Restricted Project
apazos added inline comments to D57497: [RISCV] Passing small data limitation value to RISCV backend.
Mar 20 2019, 2:05 PM · Restricted Project
apazos added inline comments to D57493: [RISCV] Put data smaller than eight bytes to small data section.
Mar 20 2019, 1:47 PM · Restricted Project

Mar 8 2019

apazos committed rG5254d1baae63: [RISCV] Allow access to FP CSRs without F extension (authored by apazos).
[RISCV] Allow access to FP CSRs without F extension
Mar 8 2019, 3:01 PM
apazos committed rL355753: [RISCV] Allow access to FP CSRs without F extension.
[RISCV] Allow access to FP CSRs without F extension
Mar 8 2019, 3:01 PM
apazos closed D58932: [RISCV] Allow access to FP CSRs without F extension.
Mar 8 2019, 3:01 PM · Restricted Project
apazos added a comment to D59023: [RISCV] Support -target-abi at the MC layer and for codegen.

Thanks Alex, LGTM.

Mar 8 2019, 1:49 PM · Restricted Project
apazos added inline comments to D59023: [RISCV] Support -target-abi at the MC layer and for codegen.
Mar 8 2019, 10:00 AM · Restricted Project

Mar 7 2019

apazos updated the diff for D58932: [RISCV] Allow access to FP CSRs without F extension.

Leaving pseudo instructions that access FP CSRs untouched for now.

Mar 7 2019, 1:25 PM · Restricted Project
apazos added a comment to D58932: [RISCV] Allow access to FP CSRs without F extension.

OK, I can restrict the patch to access CSR names and value range without F extension, while we wait GCC and the RISC-V specs to be updated.

Mar 7 2019, 8:56 AM · Restricted Project

Mar 6 2019

apazos added a comment to D58943: [RISCV][MC] Find matching pcrel_hi fixup in more cases..

LGTM, I have verified the patch with some workloads and found no new issue.

Mar 6 2019, 6:33 PM · Restricted Project
apazos added inline comments to D59023: [RISCV] Support -target-abi at the MC layer and for codegen.
Mar 6 2019, 6:27 PM · Restricted Project
apazos abandoned D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

We are going with the alternative in https://reviews.llvm.org/D58943

Mar 6 2019, 4:56 PM

Mar 4 2019

apazos added a comment to D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

Hi Eli, this current patch as it is fails for the test case you highlighted. Thanks for clarifying and pushing an alternative solution.

Mar 4 2019, 8:33 PM
apazos created D58932: [RISCV] Allow access to FP CSRs without F extension.
Mar 4 2019, 3:39 PM · Restricted Project
apazos added a comment to D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

Hi Eli,

Mar 4 2019, 1:43 PM
apazos retitled D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi from Fixed error: could not find corresponding %pcrel_hi to [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.
Mar 4 2019, 10:15 AM

Mar 1 2019

apazos abandoned D58485: [WIP] Experimenting with aligning with GCC LIR behavior at Os.

Not profitable

Mar 1 2019, 5:09 PM
apazos updated subscribers of D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.
Mar 1 2019, 2:09 PM
apazos updated the diff for D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

Updated triple in test case

Mar 1 2019, 1:27 PM
apazos retitled D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi from [RISCV] (WIP) Fixed error: could not find corresponding %pcrel_hi to Fixed error: could not find corresponding %pcrel_hi.
Mar 1 2019, 1:25 PM
apazos edited reviewers for D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi, added: eli.friedman; removed: lewis-revill.
Mar 1 2019, 1:11 PM
apazos updated subscribers of D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.
Mar 1 2019, 1:10 PM
apazos updated the diff for D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

Reduced code changes, added test case

Mar 1 2019, 1:09 PM
apazos added a comment to D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.

Hi Lewis, yes it is possible to reduce the code changes. I will push an update.
The concern I have is that for pseudo instructions it was enough to change RISCVAsmParser.cpp to fix the problem. But for the expanded instructions I have to modify AsmParser.cpp.
So maybe instead of adding a new EmitLabel we change the current api.

Mar 1 2019, 1:03 PM

Feb 27 2019

apazos added a reviewer for D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi: lewis-revill.

Lewis, is this what you had in mind, I only changed RISC-V parser path.

Feb 27 2019, 8:56 PM
apazos created D58759: [RISCV][MC] Fixed error: could not find corresponding %pcrel_hi.
Feb 27 2019, 8:50 PM
apazos added a comment to D54029: [RISCV] Properly evaluate fixup_riscv_pcrel_lo12.

Thanks for the analysis and suggestion Lewis.

Feb 27 2019, 8:48 PM · Restricted Project

Feb 20 2019

apazos created D58485: [WIP] Experimenting with aligning with GCC LIR behavior at Os.
Feb 20 2019, 6:11 PM
Herald added a project to D54029: [RISCV] Properly evaluate fixup_riscv_pcrel_lo12: Restricted Project.

Hi James, I encountered another case not handled yet in this patch. It produces the error: could not find corresponding %pcrel_hi

Feb 20 2019, 1:01 PM · Restricted Project

Feb 14 2019

apazos committed rG6dbe86597a8f: Fixed failure on Darwin due to r354064 (authored by apazos).
Fixed failure on Darwin due to r354064
Feb 14 2019, 4:21 PM
apazos committed rC354089: Fixed failure on Darwin due to r354064.
Fixed failure on Darwin due to r354064
Feb 14 2019, 4:21 PM
apazos committed rL354089: Fixed failure on Darwin due to r354064.
Fixed failure on Darwin due to r354064
Feb 14 2019, 4:21 PM
apazos closed D58259: Fixed failure on Darwin due to r354064.
Feb 14 2019, 4:21 PM · Restricted Project
apazos created D58259: Fixed failure on Darwin due to r354064.
Feb 14 2019, 3:27 PM · Restricted Project
apazos committed rGbbb8129b2cdd: Set hidden attribute on lprofMergeValueProfData (authored by apazos).
Set hidden attribute on lprofMergeValueProfData
Feb 14 2019, 1:38 PM
apazos committed rCRT354064: Set hidden attribute on lprofMergeValueProfData.
Set hidden attribute on lprofMergeValueProfData
Feb 14 2019, 1:38 PM
apazos committed rL354064: Set hidden attribute on lprofMergeValueProfData.
Set hidden attribute on lprofMergeValueProfData
Feb 14 2019, 1:38 PM
apazos closed D55893: Set hidden attribute on lprofMergeValueProfData.
Feb 14 2019, 1:38 PM · Restricted Project

Feb 12 2019

apazos updated the diff for D55893: Set hidden attribute on lprofMergeValueProfData.

I added a test case to verify the fix prevents lprofMergeValueProfData from another module from being accessed.

Feb 12 2019, 5:26 PM · Restricted Project

Feb 11 2019

apazos committed rG9a3dc3e60bf0: [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types (authored by apazos).
[LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types
Feb 11 2019, 2:10 PM
apazos committed rL353757: [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types.
[LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types
Feb 11 2019, 2:10 PM
apazos closed D57875: [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types.
Feb 11 2019, 2:10 PM · Restricted Project

Feb 8 2019

apazos added a comment to D57875: [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types.

Without the patch, the fneg use in the given test case becomes a sub lib call in the targets I checked when using soft abi (riscv, arm)

Feb 8 2019, 2:56 PM · Restricted Project
apazos resigned from D25634: Fix replacedSelectWithOperand in InstCombiner to handle branch having two same successors..
Feb 8 2019, 10:40 AM
apazos resigned from D8371: Allow code generation of ARM usat/ssat instructions.
Feb 8 2019, 10:39 AM
apazos resigned from D3476: Fix use_iterator in ARM64AddressTypePromotion.
Feb 8 2019, 10:38 AM

Feb 7 2019

apazos added a comment to D50496: [RISCV] Implment pseudo instructions for load/store from a symbol address..

The patch is not applying cleanly due to the added test/MC/RISCV/rv64i-pseudos.s which was first added in https://reviews.llvm.org/D55325

Feb 7 2019, 10:31 AM · Restricted Project

Feb 6 2019

apazos added a comment to D57497: [RISCV] Passing small data limitation value to RISCV backend.

If this is a target flag in GCC, shouldn't we make it a LLVM Target feature and pass it as -mattr, just like done for mrelax?

Feb 6 2019, 10:23 PM · Restricted Project
apazos added a comment to D57875: [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types.

For the cases it does not transform, we still do not need to make lib calls.

Feb 6 2019, 9:50 PM · Restricted Project
apazos updated subscribers of D57875: [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types.
Feb 6 2019, 8:17 PM · Restricted Project
apazos created D57875: [LegalizeTypes] Expand FNEG to bitwise op for IEEE FP types.
Feb 6 2019, 8:16 PM · Restricted Project

Feb 5 2019

apazos added a comment to D57497: [RISCV] Passing small data limitation value to RISCV backend.

So Eli is concerned we might end up with many globals in the small data section or not picking the best candidates if we pass -G to all files in LTO.
I don’t know if anyone has experimented with a heuristic to selectively pick which globals and of which size will be allowed to go into the small data section.
Simon, do you have any insight?
Shiva, maybe for now we don’t pass the flag to LTO. But I think you got the correct mechanism. The only other suggestion I have is to add a RISC-V specific function to avoid too much RISC-V specific code in gnutools::Linker::constructJob. You just check the triple and call something like toolchains::RISCVToolChain::AddGoldPluginAdditionalFlags.

Feb 5 2019, 3:34 PM · Restricted Project

Feb 3 2019

apazos added a comment to D57497: [RISCV] Passing small data limitation value to RISCV backend.

I don't see -plugin-opt=-riscv-ssection-threshold=.. being passed.
tools::gnutools::Linker::ConstructJob is being invoked with target riscv32-unknown-linux-gnu
It has to work for riscv32-unknown-linux-gnu and riscv32-unknown-elf

Feb 3 2019, 8:12 AM · Restricted Project
apazos added a comment to D57497: [RISCV] Passing small data limitation value to RISCV backend.

Hi Shiva, I will check, but I think you need to also modify gnutools:Linker because riscv::Linker is called for baremetal. I think you need in both places.
The way I check is by invoking -flto -v from clang and look at the arguments passed to the compiler and linker

Feb 3 2019, 7:46 AM · Restricted Project

Feb 2 2019

apazos added a comment to D57497: [RISCV] Passing small data limitation value to RISCV backend.

Hi Shiva, I think you need to check for and pass along the -G option to the linker (gnutools::Linker and RISCV::Linker) and will be available for LTO. Check Hexagon, it passes the threshold value to the assembler (via -gpsize) and linker (via -G).

Feb 2 2019, 6:45 PM · Restricted Project

Feb 1 2019

Herald added a project to D57493: [RISCV] Put data smaller than eight bytes to small data section: Restricted Project.
Feb 1 2019, 4:48 PM · Restricted Project

Jan 25 2019

apazos committed rL352237: Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI.
Reapply: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI
Jan 25 2019, 12:24 PM

Jan 24 2019

apazos added a comment to D57141: [RISCV] Add implied zero offset load/store alias patterns.

Yes James, please post your patch and tests. Kito quickly posted this one to unblock me.

Jan 24 2019, 2:39 PM · Restricted Project

Jan 23 2019

apazos committed rL352014: Revert "[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI".
Revert "[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI"
Jan 23 2019, 7:02 PM
apazos committed rL352010: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI.
[RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI
Jan 23 2019, 6:42 PM
apazos closed D56526: [RISCV] Set isAsCheapAsAMove for ADDI, ORI, XORI, LUI.
Jan 23 2019, 6:42 PM
apazos committed rL352008: [RISCV] Set isReMaterializable for ORI, XORI.
[RISCV] Set isReMaterializable for ORI, XORI
Jan 23 2019, 6:32 PM
apazos closed D57069: [RISCV] Set isReMaterializable for ORI, XORI.
Jan 23 2019, 6:32 PM