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Wed, Jul 24

dp created D65231: [AMDGPU][MC][GFX10] Enabled null with 64-bit operands.
Wed, Jul 24, 10:43 AM
dp created D65229: [AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null.
Wed, Jul 24, 10:35 AM
dp created D65228: [AMDGPU][MC][GFX10] Corrected constant bus limit for 64-bit shift instructions.
Wed, Jul 24, 10:28 AM
dp created D65224: [AMDGPU][MC] Corrected parsing of registers.
Wed, Jul 24, 10:14 AM
dp committed rG5e1dd02c9099: [AMDGPU][MC][GFX10] Enabled GFX10 assembly with arbitrary wavesize assumed by… (authored by dp).
[AMDGPU][MC][GFX10] Enabled GFX10 assembly with arbitrary wavesize assumed by…
Wed, Jul 24, 9:53 AM
dp updated the diff for D65216: [AMDGPU][MC] Enabled GFX10 assembly with arbitrary wavesize assumed by the code.

The only GFX10 instructions which use exec affected by wave size are v_cmpx*. But in our assembler they use exec implicitly. So I cannot imagine any relevant tests with exec. I added 2 rather formal tests instead:

Wed, Jul 24, 9:20 AM · Restricted Project
dp accepted D65158: [AMDGPU] Add all vgpr classes to asm parser.

LGTM

Wed, Jul 24, 8:54 AM · Restricted Project
dp created D65216: [AMDGPU][MC] Enabled GFX10 assembly with arbitrary wavesize assumed by the code.
Wed, Jul 24, 8:41 AM · Restricted Project

Jul 22 2019

dp added a comment to D62911: WIP: AMDGPU: Use fixup for local linkage functions.

I contemplate if adding a 'proxy' instruction like s_add_u64 would help.
Code emitter would expand it into s_add+s_addc and handle relocations.
Assembly output would look like this:

Jul 22 2019, 11:39 AM

Jul 19 2019

dp committed rG4ccb7f8c4507: [AMDGPU][MC] Corrected parsing of branch offsets (authored by dp).
[AMDGPU][MC] Corrected parsing of branch offsets
Jul 19 2019, 6:18 AM

Jul 15 2019

dp committed rG5153b1723a62: [AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message (authored by dp).
[AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message
Jul 15 2019, 8:13 AM
dp committed rG8d879c8d9549: [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions (authored by dp).
[AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions
Jul 15 2019, 7:39 AM
dp created D64729: [AMDGPU][MC][GFX9][GFX10] Added support of GET_DOORBELL message.
Jul 15 2019, 5:58 AM · Restricted Project
dp created D64716: [AMDGPU][MC] Corrected encoding of src0 for DS_GWS_* instructions.
Jul 15 2019, 5:25 AM · Restricted Project

Jul 12 2019

dp created D64629: [AMDGPU][MC] Corrected parsing of branch offsets.
Jul 12 2019, 5:46 AM · Restricted Project

Jul 8 2019

dp committed rG463b87ae888d: [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. (authored by dp).
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Jul 8 2019, 10:11 AM
dp committed rGcef9d42157e5: [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description. (authored by dp).
[AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Jul 8 2019, 9:51 AM
dp committed rG2eff0318c660: [AMDGPU][MC] Corrected parsing of FLAT offset modifier (authored by dp).
[AMDGPU][MC] Corrected parsing of FLAT offset modifier
Jul 8 2019, 7:28 AM

Jul 5 2019

dp updated the diff for D64244: [AMDGPU][MC] Corrected parsing of FLAT offset modifier.

Corrected a typo

Jul 5 2019, 6:37 AM · Restricted Project
dp created D64244: [AMDGPU][MC] Corrected parsing of FLAT offset modifier.
Jul 5 2019, 5:43 AM · Restricted Project

Jun 28 2019

dp committed rGe1eb25ff3e59: [AMDGPU][MC] Fix 2 for sanitizer failure in 364645 (authored by dp).
[AMDGPU][MC] Fix 2 for sanitizer failure in 364645
Jun 28 2019, 9:30 AM
dp committed rGd12966c08835: [AMDGPU][MC] Fix for sanitizer failure in 364645 (authored by dp).
[AMDGPU][MC] Fix for sanitizer failure in 364645
Jun 28 2019, 8:25 AM
dp committed rG1d572ce39559: [AMDGPU][MC] Enabled constant expressions as operands of sendmsg (authored by dp).
[AMDGPU][MC] Enabled constant expressions as operands of sendmsg
Jun 28 2019, 7:15 AM

Jun 14 2019

dp accepted D63272: AMDGPU: Fix printing trailing whitespace after s_endpgm.

Looks fine.

Jun 14 2019, 3:28 AM
dp updated the diff for D62735: [AMDGPU][MC] Corrected parsing of sendmsg.

Corrected typos in function attributes

Jun 14 2019, 3:16 AM · Restricted Project

Jun 13 2019

dp committed rG1fca3b1972dd: [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg (authored by dp).
[AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg
Jun 13 2019, 5:44 AM

Jun 3 2019

dp committed rG9111f35f0233: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands (authored by dp).
[AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands
Jun 3 2019, 6:49 AM

May 31 2019

dp added inline comments to D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.
May 31 2019, 9:32 AM · Restricted Project
dp updated the diff for D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.

Corrected SIInstrInfo::usesConstantBus

May 31 2019, 9:02 AM · Restricted Project
dp retitled D62735: [AMDGPU][MC] Corrected parsing of sendmsg from [AMDGPU][MC] Enabled constant expressions as operands of s_sendmsg* to [AMDGPU][MC] Corrected parsing of sendmsg.
May 31 2019, 7:26 AM · Restricted Project
dp created D62735: [AMDGPU][MC] Corrected parsing of sendmsg.
May 31 2019, 7:20 AM · Restricted Project
dp added inline comments to D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.
May 31 2019, 6:50 AM · Restricted Project
dp updated the diff for D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.

Corrected SIInstrInfo::usesConstantBus

May 31 2019, 4:42 AM · Restricted Project

May 30 2019

dp added a comment to D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.

I may be missing something, but these registers are already handled by AMDGPU::isSGPR() because they are defined in SReg_32RegClass.
The same is true for AMDGPUAsmParser::usesConstantBus.

May 30 2019, 10:43 AM · Restricted Project
dp created D62660: [AMDGPU][MC] Added support of SCC, VCCZ and EXECZ operands.
May 30 2019, 6:43 AM · Restricted Project

May 27 2019

dp committed rGb79af7930cac: [AMDGPU][MC] Enabled constant expressions as operands of s_waitcnt (authored by dp).
[AMDGPU][MC] Enabled constant expressions as operands of s_waitcnt
May 27 2019, 7:09 AM

May 22 2019

dp updated the diff for D61125: [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg.
  1. Updated to account for GFX10 hw registers.
  2. Separated bits juggling from high-level code.
May 22 2019, 8:15 AM · Restricted Project
dp committed rG7773fc478d32: [AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiers (authored by dp).
[AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiers
May 22 2019, 6:59 AM

May 17 2019

dp committed rG198611b0ff7e: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers (authored by dp).
[AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers
May 17 2019, 9:02 AM
dp committed rG5ae3113969b7: [AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_fork (authored by dp).
[AMDGPU][MC] Enabled labels with s_call_b64 and s_cbranch_i_fork
May 17 2019, 7:55 AM
dp committed rG43fcc79837cd: [AMDGPU][MC] Enabled expressions for most operands which accept integer values (authored by dp).
[AMDGPU][MC] Enabled expressions for most operands which accept integer values
May 17 2019, 6:16 AM

May 16 2019

dp added a comment to D62016: [AMDGPU][MC] Enabled labels as operands of s_call_b64 and s_cbranch_i_fork.

This is checked during fixups relaxations. An error is reported if the offset does not fit in 16 bits. See lit test max-branch-distance.s

May 16 2019, 11:35 AM · Restricted Project
dp created D62016: [AMDGPU][MC] Enabled labels as operands of s_call_b64 and s_cbranch_i_fork.
May 16 2019, 11:05 AM · Restricted Project
dp added a comment to D61009: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers.

Thanks!

May 16 2019, 10:52 AM · Restricted Project

May 15 2019

dp added a comment to D61009: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers.

ping

May 15 2019, 4:28 AM · Restricted Project

May 14 2019

dp committed rGee51d851eae5: [AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases (authored by dp).
[AMDGPU][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases
May 14 2019, 12:14 PM
dp updated the diff for D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.

Retitled and removed a comment

May 14 2019, 10:40 AM · Restricted Project
dp updated the diff for D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.

Removed GFX10-relevant changes

May 14 2019, 9:32 AM · Restricted Project
dp added a comment to D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.

SWDEV-188513 is P2. Could you correct the offending predicate by your next commit?
Or I can remove all changes except the predicate correction - that will not affect GFX10.

May 14 2019, 8:51 AM · Restricted Project
dp created D61905: [AMDGPU][MC][GFX8][GFX9] Corrected predicate of v_*_co_u32 aliases.
May 14 2019, 8:38 AM · Restricted Project

Apr 26 2019

dp added inline comments to D60768: [AMDGPU][MC] Enabled generic constant expressions as operands.
Apr 26 2019, 6:11 AM · Restricted Project

Apr 25 2019

dp created D61125: [AMDGPU][MC] Enabled constant expressions as operands of s_getreg/s_setreg.
Apr 25 2019, 3:28 AM · Restricted Project

Apr 24 2019

dp committed rG47621d7c8935: [AMDGPU][MC] Parser cleanup and refactoring (authored by dp).
[AMDGPU][MC] Parser cleanup and refactoring
Apr 24 2019, 7:08 AM

Apr 23 2019

dp created D61017: [AMDGPU][MC] Enabled constant expressions as operands of s_waitcnt.
Apr 23 2019, 6:59 AM · Restricted Project
dp created D61012: [AMDGPU][MC] Corrected parsing of op_sel* and neg_* modifiers.
Apr 23 2019, 6:39 AM · Restricted Project
dp created D61009: [AMDGPU][MC] Corrected parsing of NAME:VALUE modifiers.
Apr 23 2019, 6:23 AM · Restricted Project
dp added a reviewer for D60768: [AMDGPU][MC] Enabled generic constant expressions as operands: vpykhtin.
Apr 23 2019, 2:20 AM · Restricted Project

Apr 22 2019

dp committed rGe2707f5aac91: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier (authored by dp).
[AMDGPU][MC] Corrected parsing of SP3 'neg' modifier
Apr 22 2019, 7:36 AM

Apr 17 2019

dp committed rG394d0a163714: [AMDGPU][MC] Corrected handling of "-" before expressions (authored by dp).
[AMDGPU][MC] Corrected handling of "-" before expressions
Apr 17 2019, 9:55 AM
dp committed rG20d52e3aa2db: [AMDGPU][MC] Corrected parsing of registers (authored by dp).
[AMDGPU][MC] Corrected parsing of registers
Apr 17 2019, 7:43 AM

Apr 16 2019

dp added a parent revision for D60768: [AMDGPU][MC] Enabled generic constant expressions as operands: D60767: [AMDGPU][MC] Parser cleanup and refactoring.
Apr 16 2019, 4:22 AM · Restricted Project
dp created D60768: [AMDGPU][MC] Enabled generic constant expressions as operands.
Apr 16 2019, 4:22 AM · Restricted Project
dp added a child revision for D60767: [AMDGPU][MC] Parser cleanup and refactoring: D60768: [AMDGPU][MC] Enabled generic constant expressions as operands.
Apr 16 2019, 4:22 AM · Restricted Project
dp added a parent revision for D60767: [AMDGPU][MC] Parser cleanup and refactoring: D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier.
Apr 16 2019, 3:03 AM · Restricted Project
dp added a child revision for D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier: D60767: [AMDGPU][MC] Parser cleanup and refactoring.
Apr 16 2019, 3:03 AM · Restricted Project
dp created D60767: [AMDGPU][MC] Parser cleanup and refactoring.
Apr 16 2019, 3:03 AM · Restricted Project

Apr 12 2019

dp added reviewers for D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier: arsenm, artem.tamazov.
Apr 12 2019, 10:28 AM · Restricted Project
dp added reviewers for D60622: [AMDGPU][MC] Corrected handling of "-" before expressions: arsenm, artem.tamazov.
Apr 12 2019, 10:28 AM · Restricted Project
dp added reviewers for D60621: [AMDGPU][MC] Corrected parsing of registers: arsenm, artem.tamazov.
Apr 12 2019, 10:22 AM · Restricted Project
dp added inline comments to D60621: [AMDGPU][MC] Corrected parsing of registers.
Apr 12 2019, 10:22 AM · Restricted Project
dp added a parent revision for D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier: D60622: [AMDGPU][MC] Corrected handling of "-" before expressions.
Apr 12 2019, 10:20 AM · Restricted Project
dp added a child revision for D60622: [AMDGPU][MC] Corrected handling of "-" before expressions: D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier.
Apr 12 2019, 10:20 AM · Restricted Project
dp added a child revision for D60621: [AMDGPU][MC] Corrected parsing of registers: D60622: [AMDGPU][MC] Corrected handling of "-" before expressions.
Apr 12 2019, 10:20 AM · Restricted Project
dp added a parent revision for D60622: [AMDGPU][MC] Corrected handling of "-" before expressions: D60621: [AMDGPU][MC] Corrected parsing of registers.
Apr 12 2019, 10:20 AM · Restricted Project
dp created D60624: [AMDGPU][MC] Corrected parsing of SP3 'neg' modifier.
Apr 12 2019, 10:17 AM · Restricted Project
dp created D60622: [AMDGPU][MC] Corrected handling of "-" before expressions.
Apr 12 2019, 10:09 AM · Restricted Project
dp created D60621: [AMDGPU][MC] Corrected parsing of registers.
Apr 12 2019, 9:13 AM · Restricted Project

Mar 29 2019

dp committed rGd6827ce3a35e: [AMDGPU][MC] Corrected conversion rules for inlinable constants to match rules… (authored by dp).
[AMDGPU][MC] Corrected conversion rules for inlinable constants to match rules…
Mar 29 2019, 7:49 AM
dp committed rG7f33574be341: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes (authored by dp).
[AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes
Mar 29 2019, 5:16 AM

Mar 27 2019

dp created D59878: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.
Mar 27 2019, 6:56 AM · Restricted Project
dp committed rG40f0162a9a99: Revert of 357063 [AMDGPU][MC] Corrected handling of tied src for atomic return… (authored by dp).
Revert of 357063 [AMDGPU][MC] Corrected handling of tied src for atomic return…
Mar 27 2019, 6:50 AM
dp committed rGbcc4d5383545: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes (authored by dp).
[AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes
Mar 27 2019, 6:09 AM

Mar 25 2019

dp created D59786: [AMDGPU][MC] Corrected truncation rules for integer inlinable constants to match rules for literals.
Mar 25 2019, 11:10 AM · Restricted Project

Mar 21 2019

dp added a comment to D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.

ping

Mar 21 2019, 11:17 AM · Restricted Project

Mar 20 2019

dp committed rG04bd1185ade5: [AMDGPU][MC] Corrected checks for DS offset0 range (authored by dp).
[AMDGPU][MC] Corrected checks for DS offset0 range
Mar 20 2019, 10:15 AM
dp committed rG137976fae22d: [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit… (authored by dp).
[AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit…
Mar 20 2019, 8:40 AM

Mar 19 2019

dp added a comment to D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.

Could you explain what issues you see in this change? I'm trying to make assembler as close to SP3 as possible.

Mar 19 2019, 5:50 AM · Restricted Project

Mar 15 2019

dp updated the diff for D59290: [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id.

After a discussion with HW people it turned out that these operands (shared_base, shared_limit etc) differ from inline constants in that they compete with other scalars for constant bus access.

Mar 15 2019, 9:54 AM · Restricted Project

Mar 14 2019

dp added a comment to D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.

Shader programming documents state that MUBUF SOFFSET is "SGPR to supply unsigned byte offset. Must be an SGPR, M0 or inline constant."
Also note that our tests are based on SP3 tables which also allow inline constants.
Of course, using fp inline constants in this context is meaningless.

Mar 14 2019, 3:37 AM · Restricted Project

Mar 13 2019

dp created D59313: [AMDGPU][MC] Corrected checks for DS offset0 range.
Mar 13 2019, 11:08 AM · Restricted Project
dp created D59305: [AMDGPU][MC] Corrected handling of tied src for atomic return MUBUF opcodes.
Mar 13 2019, 9:51 AM · Restricted Project
dp created D59290: [AMDGPU][MC][GFX9] Added support of operands shared_base, shared_limit, private_base, private_limit, pops_exiting_wave_id.
Mar 13 2019, 3:18 AM · Restricted Project

Mar 4 2019

dp committed rG6023d5990d06: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32… (authored by dp).
[AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32…
Mar 4 2019, 4:48 AM

Feb 27 2019

dp committed rG7904231edb18: [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands (authored by dp).
[AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands
Feb 27 2019, 5:59 AM
dp committed rGef9203582776: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of… (authored by dp).
[AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of…
Feb 27 2019, 5:15 AM
dp added a parent revision for D58713: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32: D58287: [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands.
Feb 27 2019, 4:54 AM · Restricted Project
dp added a child revision for D58287: [AMDGPU][MC] Added register size check for VOP3/SDWA/DPP operands: D58713: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32.
Feb 27 2019, 4:54 AM · Restricted Project
dp created D58713: [AMDGPU][MC] Enable lds_direct operand for v_readfirstlane_b32, v_readlane_b32 and v_writelane_b32.
Feb 27 2019, 4:54 AM · Restricted Project
dp added a comment to D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.

Typos has been corrected. Thanks!

Feb 27 2019, 3:33 AM · Restricted Project

Feb 25 2019

dp updated the diff for D58288: [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode.

Updated as suggested by Matt

Feb 25 2019, 5:39 AM · Restricted Project