LGTM.
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LGTM, but I suggest moving the test to some other place. *_unsupported.s are used solely to test identification of unsupported opcodes. gfx7_err_pos.s may be a better place for this test.
Is there a ticket to be mentioned in the commit message?
There is no ticket. I found this bug while analyzing your patch and trying to break the parser.
Tue, Jan 24
Does your patch fix this bug?
I think that worked for CI only
The patch itself looks fine, but it breaks backward compatibility with existing code.
I think if you make offset mandatory for GFX6 and GFX7, the same should be done for other GPUs. But IMO preserving compatibility with existing code is more important.
BTW, have you noticed that SP3 does not allow 32-bit offsets with SMRD? LLVM assembler accepts these, but I do not know if HW can handle it.
Fri, Jan 13
LGTM.
Thu, Jan 12
LGTM.
Tue, Jan 10
In general, I like your idea and I see that further improvements are possible. Your second patch seems to better justify this approach.
Jan 9 2023
LGTM
Dec 30 2022
Dec 21 2022
Dec 20 2022
Dec 19 2022
Dec 16 2022
LGTM, thanks!
Dec 15 2022
Very nice refactoring!
Dec 13 2022
Dec 9 2022
LGTM with a nit.
Overall looks good.
Dec 7 2022
In most cases if instruction can't use some bits in encoding of an operand, those bits are set to default value in td file.
AFAIK, we use ? as a default value to allow disassembler ignore these bits.
LGTM.
By design, disassembler should be able to decode invalid code when possible. It is much more helpful for the user to see something like this:
Dec 6 2022
LGTM.
Dec 5 2022
Dec 2 2022
Nice refactoring!
Dec 1 2022
Update comment describing isSISrcOperand.
Rebase; update tests to add error line numbers.
Nov 30 2022
Nov 29 2022
Retitle and correct as suggested by Joe.
Nov 25 2022
Ping.
Nov 24 2022
Correct as suggested by Jay.
Nov 23 2022
Corrected as suggested by Joe.
Joe, thanks for your valuable comments!
LGTM. Nice improvements!
Nov 22 2022
Nov 18 2022
Nov 17 2022
Updated as suggested by Joe:
Nov 16 2022
! In D137952, @Joe_Nash wrote:
Now I see that it does not iterate over MCInst operands. So clearly it is confusing :).
SrcIdx is an index into parsed src operands which is a subset of parsed operands.
So maybe these renames are most accurate:getParsedSrcIndex -> getParsedOpIdxFromSrcIdx
SrcIdx -> CombinedSrcIdx
getParsedDstIndex -> getParsedOpIdxOfDstIn getRegIndicies
I think SrcIdx is acutally ComponentSrcIdx
Renames:
SrcIdx -> ComponentSrcIdx
getSrcIndex -> getCombinedMCSrcIdxFromComponentSrcIdxobviously this is getting really verbose, but that's probably better than confusingly named.
Nov 15 2022
Rebase.
I suggest doing renaming in a separate patch because it is a separate problem introduced before this change.
Add a comment describing InstInfo::getRegIndices.
Nov 14 2022
Why does it change the error position?
Still LGTM.
LGTM.
Nov 11 2022
LGTM, thanks!
LGTM.
The currently reported position is the beginning of the first operand and in the current design there seems to be no way to do better
Could you add a test to check the reported error position? Unfortunately, AsmMatcher often fails to report the location of offending operand. Moving the check to validator may improve diagnostic by using getImmLoc.