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dmgreen created D80524: [ARM] Extra MVE VMLAV reduction patterns.
Mon, May 25, 9:37 AM · Restricted Project
dmgreen committed rG9ff361b099f1: [ARM] VMULH tests for when other parts are working. NFC (authored by dmgreen).
[ARM] VMULH tests for when other parts are working. NFC
Mon, May 25, 4:47 AM
dmgreen created D80516: [ConstantFolding] Constant folding for integer vector reduce intrinsics.
Mon, May 25, 4:46 AM · Restricted Project
dmgreen created D80515: [ARM] VQMOVN demand bits analysis.
Mon, May 25, 4:14 AM · Restricted Project
dmgreen updated the diff for D76909: [MachineScheduler] Update available queue on the first mop of a new cycle.

I managed to sort out the problems I was seeing. It was due to some incorrect information in one of our schedule models. With that out of the way, I think this is the best way forward again.

Mon, May 25, 4:14 AM · Restricted Project

Sun, May 24

dmgreen added a comment to D80236: [VectorCombine] position pass after SLP in the optimization pipeline rather than before.

I added the EarlyCSE cleanup as part of D75145. And it was noted there as causing perf regressions for ARM code (cc @dmgreen), so it was not ideal from the start.

Sun, May 24, 11:44 AM · Restricted Project

Thu, May 21

dmgreen added inline comments to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.
Thu, May 21, 7:31 AM · Restricted Project
dmgreen accepted D79163: [Target][ARM] Tune getCastInstrCost for extending masked loads and truncating masked stores.

Thanks. LGTM, so long as we can get the first patch in too.

Thu, May 21, 7:31 AM · Restricted Project
dmgreen added a comment to D78937: [CostModel] Use isExtLoad in BasicTTI.

This would conflict with D79162. That's not the prettiest patch in the world, but it solves some real problems we have in the vectorizer and moving further away from it seems like a mistake.

Thu, May 21, 2:40 AM · Restricted Project
dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.

@Pierre-vh Sam has made some potentially awkward changes here. Can you rebase this and see if it's still looking OK?

Thu, May 21, 2:40 AM · Restricted Project

Wed, May 20

dmgreen added inline comments to D75069: [LoopVectorizer] Inloop vector reductions.
Wed, May 20, 5:07 PM · Restricted Project
dmgreen updated the diff for D75069: [LoopVectorizer] Inloop vector reductions.

Round one. Lots of renaming, plenty of cleanup. I've tried to add Min/Max handling too, and added/cleaned up some more test. Hopefully addressed most of the comments.

Wed, May 20, 4:33 PM · Restricted Project
dmgreen added inline comments to D80320: [AARCH64][NEON] Allow to sink operands of aarch64_neon_pmull64..
Wed, May 20, 4:33 PM · Restricted Project
dmgreen added inline comments to D78922: [CostModel] Remove getExtCost.
Wed, May 20, 9:16 AM · Restricted Project
dmgreen added inline comments to D78922: [CostModel] Remove getExtCost.
Wed, May 20, 7:35 AM · Restricted Project
dmgreen added a comment to D75069: [LoopVectorizer] Inloop vector reductions.

Thanks for the review! You rock. I'll update this as per the comments.

Wed, May 20, 12:30 AM · Restricted Project

Tue, May 19

dmgreen created D80273: [LSR] Filter for postinc formulae.
Tue, May 19, 11:57 PM · Restricted Project
dmgreen accepted D80238: [AArch64] Fix unwind info generated by outliner..

Oh right. Nice one. I hadn't even realized it created these cfi directives (although, I'm not sure what I did expect. That they magiked out of thin air?)

Tue, May 19, 11:57 PM · Restricted Project
dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.

Thanks. I would be happy with this. But I'd like to get a second opinion on that.

Tue, May 19, 12:36 PM · Restricted Project
dmgreen added inline comments to D80161: [CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias.
Tue, May 19, 3:45 AM · Restricted Project
dmgreen added inline comments to D80161: [CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias.
Tue, May 19, 1:03 AM · Restricted Project

Sun, May 17

dmgreen added a comment to D75069: [LoopVectorizer] Inloop vector reductions.

Ping. Anyone have any thought/comments about this one? Does it at least look like its going in the right direction, or does anyone have some better suggestions?

Sun, May 17, 11:57 PM · Restricted Project
dmgreen updated the diff for D57254: [Outliner] Set nounwind for outlined functions.

I've been trying to take another look at this. I've just rebased it here onto some new tests.

Sun, May 17, 6:54 AM · Restricted Project

Sat, May 16

dmgreen committed rG2123bb843e4b: [ARM] Patterns for VQSHRN (authored by dmgreen).
[ARM] Patterns for VQSHRN
Sat, May 16, 10:01 AM
dmgreen closed D77720: [ARM] Patterns for VQSHRN.
Sat, May 16, 10:01 AM · Restricted Project
dmgreen committed rG72f1fb2edf59: [ARM] Combines for VMOVN (authored by dmgreen).
[ARM] Combines for VMOVN
Sat, May 16, 7:54 AM
dmgreen closed D77718: [ARM] Combines for VMOVN.
Sat, May 16, 7:53 AM · Restricted Project
dmgreen committed rG2e1fbf85b65d: [ARM] MVE saturating truncates (authored by dmgreen).
[ARM] MVE saturating truncates
Sat, May 16, 7:22 AM
dmgreen closed D77590: [ARM] MVE saturating truncates.
Sat, May 16, 7:22 AM · Restricted Project
dmgreen committed rG42a9ca0245a3: [ARM] Extra VQMOVN/VQSHRN tests. NFC (authored by dmgreen).
[ARM] Extra VQMOVN/VQSHRN tests. NFC
Sat, May 16, 7:22 AM

Fri, May 15

dmgreen committed rG675d5543d423: [ARM] Change more triples to arm-none-none-eabi. NFC (authored by dmgreen).
[ARM] Change more triples to arm-none-none-eabi. NFC
Fri, May 15, 3:15 PM
dmgreen accepted D79859: [ARM][MVE] Add support for incrementing scatters.

LGTM. Thanks.

Fri, May 15, 7:00 AM · Restricted Project
dmgreen added a comment to D79941: [NFCI][CostModel] Refactor getIntrinsicInstrCost.

I'm not sure I understand. Are you getting those changes with this patch? They would seem worse to me (but MVE gathers are a bit finicky so there might be something subtly wrong with them).

Fri, May 15, 4:29 AM · Restricted Project
dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.
  • Removing instruction from calls to getCastInstrCost in the LoopVectorizer.
Fri, May 15, 4:29 AM · Restricted Project

Thu, May 14

dmgreen added inline comments to D79952: Add v16f64 value type.
Thu, May 14, 11:57 AM · Restricted Project
dmgreen added a comment to D79859: [ARM][MVE] Add support for incrementing scatters.

Nice one. Couple of nitpicks or questions.

Thu, May 14, 5:20 AM · Restricted Project
dmgreen added a comment to D77718: [ARM] Combines for VMOVN.

ping

Thu, May 14, 3:42 AM · Restricted Project
dmgreen added a comment to D77720: [ARM] Patterns for VQSHRN.

ping

Thu, May 14, 3:42 AM · Restricted Project

Wed, May 13

dmgreen committed rGfa15255d8af5: [ARM] Convert floating point splats to integer (authored by dmgreen).
[ARM] Convert floating point splats to integer
Wed, May 13, 7:33 AM
dmgreen closed D78728: [ARM] Convert floating point splats to integer.
Wed, May 13, 7:33 AM · Restricted Project
dmgreen committed rG87c56594dd98: [ARM] Sink splats to fma intrinsics (authored by dmgreen).
[ARM] Sink splats to fma intrinsics
Wed, May 13, 7:01 AM
dmgreen closed D78386: [ARM] Sink splats to fma intrinsics.
Wed, May 13, 7:00 AM · Restricted Project
dmgreen added a comment to D79768: [ARM] Exclude LR from register classes in low overhead loops.

Erm, reference for that? Because I certainly don't remember it.

Wed, May 13, 7:00 AM · Restricted Project
dmgreen accepted D79816: [SVE] Remove usages of VectorType::getNumElements() from ARM.

Sounds good to me. +1 to @fpetrogalli's comment.

Wed, May 13, 7:00 AM · Restricted Project

Tue, May 12

dmgreen updated the diff for D79768: [ARM] Exclude LR from register classes in low overhead loops.

Added GPRwithZR and GPRwithZRnosp

Tue, May 12, 3:04 PM · Restricted Project
dmgreen added a comment to D79768: [ARM] Exclude LR from register classes in low overhead loops.

I thought this one might get some pushback. I contemplated starting the summary with "Bear with me..."

Tue, May 12, 3:04 PM · Restricted Project
dmgreen added inline comments to D79163: [Target][ARM] Tune getCastInstrCost for extending masked loads and truncating masked stores.
Tue, May 12, 10:43 AM · Restricted Project
dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.

Yeah, I think this is looking better. Thanks for the update. But I would be interested in the opinion of others too. It seems to get this information through to the costmodel and be more accurate than just presuming 'I' will be correct.

Tue, May 12, 10:43 AM · Restricted Project
dmgreen accepted D79561: [ARM][CostModel] Improve getCastInstrCost.

Thanks for the updates. Looks like a good one to me.

Tue, May 12, 2:39 AM · Restricted Project
dmgreen accepted D76847: [Target][ARM] Replace re-uses of old VPR values with VPNOTs.

LGTM. Thanks.

Tue, May 12, 2:39 AM · Restricted Project
dmgreen updated the diff for D78728: [ARM] Convert floating point splats to integer.

Instruction -> ShuffleVectorInstruction and tighten the conditions for hoisting bitcasts.

Tue, May 12, 1:35 AM · Restricted Project
dmgreen updated subscribers of D78728: [ARM] Convert floating point splats to integer.
Tue, May 12, 1:35 AM · Restricted Project
dmgreen accepted D79562: [AArch64][CostModel] getCastInstrCost.

They do look like they should be free to me.

Tue, May 12, 1:34 AM · Restricted Project
dmgreen created D79768: [ARM] Exclude LR from register classes in low overhead loops.
Tue, May 12, 12:30 AM · Restricted Project

Mon, May 11

dmgreen created D79767: [ARM] Macro fuse t2LoopDec and t2LoopEnd.
Mon, May 11, 11:57 PM · Restricted Project
dmgreen accepted D76518: [ARM] CMSE code generation.

Changes LGTM still.

Mon, May 11, 11:11 PM · Restricted Project
dmgreen updated the diff for D78728: [ARM] Convert floating point splats to integer.

Rebase the tests on other changes that have gone in recently.

Mon, May 11, 3:10 AM · Restricted Project
dmgreen added inline comments to D76847: [Target][ARM] Replace re-uses of old VPR values with VPNOTs.
Mon, May 11, 1:34 AM · Restricted Project

Sat, May 9

dmgreen committed rG6eee2d9b5bdd: [ARM] Convert VDUPLANE to VDUP under MVE (authored by dmgreen).
[ARM] Convert VDUPLANE to VDUP under MVE
Sat, May 9, 11:09 AM
dmgreen closed D79606: [ARM] Convert VDUPLANE to VDUP under MVE.
Sat, May 9, 11:09 AM · Restricted Project
dmgreen updated the diff for D75069: [LoopVectorizer] Inloop vector reductions.

Rebase and a bit of a cleanup. Now uses VPValues for the VPRecipe operands.

Sat, May 9, 11:09 AM · Restricted Project

Fri, May 8

dmgreen committed rGdc2b282a8a73: [ARM] Change test target to arm-none-none-eabi. NFC (authored by dmgreen).
[ARM] Change test target to arm-none-none-eabi. NFC
Fri, May 8, 6:24 AM
dmgreen updated the summary of D79606: [ARM] Convert VDUPLANE to VDUP under MVE.
Fri, May 8, 1:01 AM · Restricted Project
dmgreen updated the diff for D79606: [ARM] Convert VDUPLANE to VDUP under MVE.

Now with an extra VMOVrh(extract(..)) -> VGETLANEu fold.

Fri, May 8, 1:01 AM · Restricted Project
dmgreen added a comment to D79606: [ARM] Convert VDUPLANE to VDUP under MVE.

If you never want VDUPLANE, it doesn't seem like there's much point to generating it in the first place; I guess you want to continue supporting it just to make it easier to share code between NEON and MVE?

Fri, May 8, 1:01 AM · Restricted Project

Thu, May 7

dmgreen created D79606: [ARM] Convert VDUPLANE to VDUP under MVE.
Thu, May 7, 3:46 PM · Restricted Project
dmgreen added inline comments to D79572: [DAG] SimplifyMultipleUseDemandedBits - remove superfluous bitcasts.
Thu, May 7, 9:40 AM · Restricted Project
dmgreen added a comment to D79562: [AArch64][CostModel] getCastInstrCost.

Is that missing the load_extends tests? Are they the same?

Thu, May 7, 7:54 AM · Restricted Project
dmgreen added a comment to D79562: [AArch64][CostModel] getCastInstrCost.

Are there costmodel tests for these? If not can you copy the ones over from ARM?

Thu, May 7, 5:03 AM · Restricted Project
dmgreen added inline comments to D79561: [ARM][CostModel] Improve getCastInstrCost.
Thu, May 7, 5:03 AM · Restricted Project

Wed, May 6

dmgreen accepted D76786: [ARM][MVE] Add support for incrementing gathers.

Thanks. I think in hindsight this might have been a couple of patches, we we managed to power through.

Wed, May 6, 11:59 PM · Restricted Project
dmgreen added a comment to D78922: [CostModel] Remove getExtCost.

It may be better to separate out the "add I to getCastInstrCost" change, which is something I agree with but seems to deserve it's own patch to get the details correct.

Wed, May 6, 11:59 PM · Restricted Project
dmgreen planned changes to D76909: [MachineScheduler] Update available queue on the first mop of a new cycle.

Thanks, but hold up. Although this does fix some problems I was seeing, it may cause others that I should look into first.

Wed, May 6, 3:20 PM · Restricted Project
dmgreen updated subscribers of D68911: [AArch64] enable (v)select to math TLI hook (WIP).

I think I tried turning this on once upon a time, but the (very limited set of) results left me saying "meh". That was probably just codesize I was looking at at the time though.

Wed, May 6, 11:20 AM · Restricted Project
dmgreen committed rGf5f83cf4df3e: [ARM] VMOVhr load -> vldr (authored by dmgreen).
[ARM] VMOVhr load -> vldr
Wed, May 6, 8:03 AM
dmgreen closed D78714: [ARM] VMOVhr load -> vldr.
Wed, May 6, 8:03 AM · Restricted Project
dmgreen committed rGd05f8a38c54a: [ARM] VMOVrh of VMOVhr (authored by dmgreen).
[ARM] VMOVrh of VMOVhr
Wed, May 6, 7:30 AM
dmgreen closed D78710: [ARM] VMOVrh of VMOVhr.
Wed, May 6, 7:30 AM · Restricted Project
dmgreen committed rGa349949f8ab1: [ARM] Extract from a VDUP (authored by dmgreen).
[ARM] Extract from a VDUP
Wed, May 6, 6:58 AM
dmgreen closed D78708: [ARM] Extract from a VDUP.
Wed, May 6, 6:58 AM · Restricted Project
dmgreen committed rGed7db68c354e: [ARM] Convert a bitcast VDUP to a VDUP (authored by dmgreen).
[ARM] Convert a bitcast VDUP to a VDUP
Wed, May 6, 6:25 AM
dmgreen closed D78706: [ARM] Convert a bitcast VDUP to a VDUP.
Wed, May 6, 6:25 AM · Restricted Project
dmgreen added inline comments to D78708: [ARM] Extract from a VDUP.
Wed, May 6, 2:39 AM · Restricted Project

Tue, May 5

dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.

If I understand correctly, I should:

  • Use {None, Normal, Masked, Interleaved and Gather} instead of the current enum values. (No Scatter? e.g. for trunc to scatter store? Do I need the "reversed" one as well?)
  • Only set CastContextHint for zext, sext and trunc.

    Is that correct? If yes, I can give it a go and we'll see how it looks.
Tue, May 5, 9:41 AM · Restricted Project
dmgreen added inline comments to D76786: [ARM][MVE] Add support for incrementing gathers.
Tue, May 5, 9:08 AM · Restricted Project
dmgreen committed rG146d44c2511a: [LSR] Don't require register reuse under postinc (authored by dmgreen).
[LSR] Don't require register reuse under postinc
Tue, May 5, 8:36 AM
dmgreen closed D79301: [LSR] Don't require reuse register under postinc.
Tue, May 5, 8:36 AM · Restricted Project
dmgreen committed rGf85acb19158b: [ARM] Correct the type on a predicate cast (authored by dmgreen).
[ARM] Correct the type on a predicate cast
Tue, May 5, 5:21 AM
dmgreen closed D79402: [ARM] Correct the type on a predicate cast.
Tue, May 5, 5:21 AM · Restricted Project
dmgreen created D79402: [ARM] Correct the type on a predicate cast.
Tue, May 5, 2:39 AM · Restricted Project
dmgreen added reviewers for D79402: [ARM] Correct the type on a predicate cast: SjoerdMeijer, samparker, ostannard.
Tue, May 5, 2:39 AM · Restricted Project
dmgreen committed rG09767af848f7: [ARM] MVE predcast with const test. NFC (authored by dmgreen).
[ARM] MVE predcast with const test. NFC
Tue, May 5, 2:07 AM
dmgreen added a comment to D79233: [ARM] Refactor lower to S[LR]I optimization.

Thanks. This looks good to me, but I remember Eli making some comments on the other patch. Please wait for him to comment again too.

Tue, May 5, 12:29 AM · Restricted Project

Mon, May 4

dmgreen accepted D77202: [Target][ARM] Fold or(A, B) more aggressively for I1 Vectors.

Thanks. LGTM, with one extra comment.

Mon, May 4, 11:57 PM · Restricted Project
dmgreen committed rG843014157850: [ARM] Complex LSR test showing inefficient codegen. NFC (authored by dmgreen).
[ARM] Complex LSR test showing inefficient codegen. NFC
Mon, May 4, 2:01 PM
dmgreen committed rGde904f5325a5: [ARM] isHardwareLoopProfitable debug messages. NFC (authored by dmgreen).
[ARM] isHardwareLoopProfitable debug messages. NFC
Mon, May 4, 11:49 AM
dmgreen added a comment to D79162: [Analysis] TTI: Add CastContextHint for getCastInstrCost.

Yes, I originally tried an enum with one entry per "kind" of load/store, as you said. It was working fine, but I felt that it was a bit confusing, as each entry had a different meaning based on the opcode. For instance, I had the MaskedVector entry, which, for most casts, meant that the operand was a masked load, but for truncs meant that the single user of the cast is a masked store. ,What if another target needs to deal with truncs of masked loads or something like that ? They wouldn't be able to use that API, they'd have to hack it. (I don't know if this will ever come up, I'm just trying to think about all of the use cases for this enum)
With the current format of the enum, it's a clearer IMHO, there is no ambiguity, and any target can add their specific case in there and deal with it in the backend.

Of course, both versions work equally well, I'm fine with both.

Mon, May 4, 10:09 AM · Restricted Project
dmgreen added inline comments to D76786: [ARM][MVE] Add support for incrementing gathers.
Mon, May 4, 5:50 AM · Restricted Project
Herald added a project to D78708: [ARM] Extract from a VDUP: Restricted Project.

ping

Mon, May 4, 5:18 AM · Restricted Project
Herald added a project to D78706: [ARM] Convert a bitcast VDUP to a VDUP: Restricted Project.

ping

Mon, May 4, 5:18 AM · Restricted Project