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Petar.Avramovic added a comment to D82651: [GlobalISel][InlineAsm] Add support for matching input constraints.

I see. I expected that reg class was already determined when previous operand was processed. I will take a look, first operand should have probably asked TargetRegisterInfo for PointerRegClass.

Fri, Jul 3, 8:34 AM · Restricted Project

Yesterday

Petar.Avramovic created D83031: AMDGPU/GlobalISel: Select G_FREEZE.
Thu, Jul 2, 3:43 AM · Restricted Project

Wed, Jul 1

Petar.Avramovic committed rG4b9ae1b7e5e0: AMDGPU/GlobalISel: Select init_exec intrinsic (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Select init_exec intrinsic
Wed, Jul 1, 3:12 AM
Petar.Avramovic closed D82885: AMDGPU/GlobalISel: Select init_exec intrinsic.
Wed, Jul 1, 3:12 AM · Restricted Project

Tue, Jun 30

Petar.Avramovic created D82885: AMDGPU/GlobalISel: Select init_exec intrinsic.
Tue, Jun 30, 9:11 AM · Restricted Project
Petar.Avramovic committed rGd7173826331e: AMDGPU/GlobalISel: Select icmp intrinsic (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Select icmp intrinsic
Tue, Jun 30, 2:08 AM
Petar.Avramovic committed rG4b980cc9ca08: [GlobalISel][InlineAsm] Add support for matching input constraints (authored by Petar.Avramovic).
[GlobalISel][InlineAsm] Add support for matching input constraints
Tue, Jun 30, 2:08 AM
Petar.Avramovic closed D82652: AMDGPU/GlobalISel: Select icmp intrinsic.
Tue, Jun 30, 2:08 AM · Restricted Project
Petar.Avramovic closed D82651: [GlobalISel][InlineAsm] Add support for matching input constraints.
Tue, Jun 30, 2:08 AM · Restricted Project

Mon, Jun 29

Petar.Avramovic updated the diff for D82652: AMDGPU/GlobalISel: Select icmp intrinsic.

Replace assert with isel fail.

Mon, Jun 29, 6:58 AM · Restricted Project
Petar.Avramovic updated the diff for D82651: [GlobalISel][InlineAsm] Add support for matching input constraints.

Added tests for matching constraints that involve sgpr. Also added one more test file with comparison between 'register class constraint' and 'matching constraint' in final asm output.

Mon, Jun 29, 6:26 AM · Restricted Project

Fri, Jun 26

Petar.Avramovic created D82652: AMDGPU/GlobalISel: Select icmp intrinsic.
Fri, Jun 26, 6:30 AM · Restricted Project
Petar.Avramovic created D82651: [GlobalISel][InlineAsm] Add support for matching input constraints.
Fri, Jun 26, 5:58 AM · Restricted Project

Thu, Jun 11

Petar.Avramovic committed rGbd3d951b8bb9: AMDGPU/GlobalISel: Fix lower for f64->f16 G_FPTRUNC (authored by Petar.Avramovic).
AMDGPU/GlobalISel: Fix lower for f64->f16 G_FPTRUNC
Thu, Jun 11, 9:22 AM
Petar.Avramovic closed D81666: AMDGPU/GlobalISel: Fix lower for f64->f16 G_FPTRUNC .
Thu, Jun 11, 9:21 AM · Restricted Project
Petar.Avramovic created D81666: AMDGPU/GlobalISel: Fix lower for f64->f16 G_FPTRUNC .
Thu, Jun 11, 8:46 AM · Restricted Project

Feb 19 2020

Petar.Avramovic committed rG5e32e7981b3a: [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store (authored by Petar.Avramovic).
[MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store
Feb 19 2020, 3:10 AM
Petar.Avramovic closed D74625: [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store.
Feb 19 2020, 3:10 AM · Restricted Project
Petar.Avramovic committed rG5171d1523dd8: [MIPS GlobalISel] Select 4 byte unaligned load and store (authored by Petar.Avramovic).
[MIPS GlobalISel] Select 4 byte unaligned load and store
Feb 19 2020, 3:00 AM
Petar.Avramovic closed D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store.
Feb 19 2020, 2:59 AM · Restricted Project
Petar.Avramovic committed rG92c80529ddb3: [MIPS GlobalISel] RegBankSelect G_MERGE_VALUES and G_UNMERGE_VALUES (authored by Petar.Avramovic).
[MIPS GlobalISel] RegBankSelect G_MERGE_VALUES and G_UNMERGE_VALUES
Feb 19 2020, 1:17 AM
Petar.Avramovic closed D74623: [MIPS GlobalISel] RegBankSelect G_MERGE_VALUES and G_UNMERGE_VALUES.
Feb 19 2020, 1:17 AM · Restricted Project

Feb 14 2020

Petar.Avramovic added a parent revision for D74625: [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store: D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store.
Feb 14 2020, 8:50 AM · Restricted Project
Petar.Avramovic added a child revision for D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store: D74625: [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store.
Feb 14 2020, 8:50 AM · Restricted Project
Petar.Avramovic added a parent revision for D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store: D74623: [MIPS GlobalISel] RegBankSelect G_MERGE_VALUES and G_UNMERGE_VALUES.
Feb 14 2020, 8:50 AM · Restricted Project
Petar.Avramovic added a child revision for D74623: [MIPS GlobalISel] RegBankSelect G_MERGE_VALUES and G_UNMERGE_VALUES: D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store.
Feb 14 2020, 8:50 AM · Restricted Project
Petar.Avramovic created D74625: [MIPS GlobalISel] Legalize non-power-of-2 and unaligned load and store.
Feb 14 2020, 8:50 AM · Restricted Project
Petar.Avramovic created D74624: [MIPS GlobalISel] Select 4 byte unaligned load and store.
Feb 14 2020, 8:50 AM · Restricted Project
Petar.Avramovic created D74623: [MIPS GlobalISel] RegBankSelect G_MERGE_VALUES and G_UNMERGE_VALUES.
Feb 14 2020, 8:41 AM · Restricted Project

Feb 7 2020

Petar.Avramovic accepted D74233: GlobalISel: Fix narrowScalar for G_{CTLZ|CTTZ}_ZERO_UNDEF.

LGTM

Feb 7 2020, 10:45 AM · Restricted Project
Petar.Avramovic accepted D74230: GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ.

LGTM

Feb 7 2020, 10:35 AM · Restricted Project
Petar.Avramovic committed rG7df5fc9e03ec: [GlobalISel] Add buildMerge with SrcOp initializer list (authored by Petar.Avramovic).
[GlobalISel] Add buildMerge with SrcOp initializer list
Feb 7 2020, 9:49 AM
Petar.Avramovic closed D74223: [GlobalISel] Add buildMerge with SrcOp initializer list.
Feb 7 2020, 9:49 AM · Restricted Project
Petar.Avramovic added inline comments to D74223: [GlobalISel] Add buildMerge with SrcOp initializer list.
Feb 7 2020, 9:40 AM · Restricted Project
Petar.Avramovic created D74223: [GlobalISel] Add buildMerge with SrcOp initializer list.
Feb 7 2020, 7:42 AM · Restricted Project
Petar.Avramovic accepted D74189: GlobalISel: Fix narrowing of G_CTPOP.

LGTM

Feb 7 2020, 3:58 AM · Restricted Project
Petar.Avramovic accepted D74188: GlobalISel: Fix lowering of G_CTLZ/G_CTTZ.

LGTM

Feb 7 2020, 3:49 AM · Restricted Project

Feb 6 2020

Petar.Avramovic added a comment to D73940: GlobalISel: Reimplement moreElementsVectorDst.

If not a new LegalizeAction maybe some other way ( like one more argument ) for targets to chose whether to create G_EXTRACT or CONCAT_VECTORS + G_UNMERGE_VALUES ?
I am not that familiar with the problem we are dealing here, but shouldn't insert + extract that are created during moreElements combine away like anyext + trunc for widen scalar ?
So this would be extract + insert into implicit def -> copy extract source if it had same type like implicit def (this is 3 instruction combine). Might that fix some of the problems?

Feb 6 2020, 10:11 AM · Restricted Project
Petar.Avramovic added a comment to D73940: GlobalISel: Reimplement moreElementsVectorDst.

This looks like a good candidate for new LegalizeAction ( MoreElementsLCM or something more appropriate ) that could be preferable more elements option for targets that support G_CONCAT_VECTORS and G_UNMERGE_VALUES for large vector sizes (large enough to hold LCM(WideTy, OrigTy) ).
Current algorithm seems to be designed for targets that prefer not to deal with vector types larger then WideTy. It would be difficult for them to deal with G_CONCAT_VECTORS and G_UNMERGE_VALUES that are not legal and likely hard to combine since they have different small LLTs.

Feb 6 2020, 7:58 AM · Restricted Project

Jan 27 2020

Petar.Avramovic committed rGcbf03aee6d81: [MIPS GlobalISel] Select population count (popcount) (authored by Petar.Avramovic).
[MIPS GlobalISel] Select population count (popcount)
Jan 27 2020, 1:01 AM
Petar.Avramovic closed D73216: [MIPS GlobalISel] Select population count (popcount).
Jan 27 2020, 1:01 AM · Restricted Project
Petar.Avramovic committed rG8bc7ba5b9ee0: [MIPS GlobalISel] Select count trailing zeros (authored by Petar.Avramovic).
[MIPS GlobalISel] Select count trailing zeros
Jan 27 2020, 12:57 AM
Petar.Avramovic closed D73215: [MIPS GlobalISel] Select count trailing zeros.
Jan 27 2020, 12:56 AM · Restricted Project
Petar.Avramovic committed rG2b66d32f3f4c: [MIPS GlobalISel] Select count leading zeros (authored by Petar.Avramovic).
[MIPS GlobalISel] Select count leading zeros
Jan 27 2020, 12:47 AM
Petar.Avramovic closed D73214: [MIPS GlobalISel] Select count leading zeros.
Jan 27 2020, 12:47 AM · Restricted Project

Jan 24 2020

Petar.Avramovic accepted D73108: [docs][mips] 10.0 Release notes.
Jan 24 2020, 1:25 AM · Restricted Project, Restricted Project

Jan 23 2020

Petar.Avramovic updated the diff for D73215: [MIPS GlobalISel] Select count trailing zeros.

Add comment in narrow scalar for cttz.

Jan 23 2020, 5:53 AM · Restricted Project
Petar.Avramovic updated the diff for D73214: [MIPS GlobalISel] Select count leading zeros.

Add comment, leave assert for another patch.

Jan 23 2020, 5:53 AM · Restricted Project
Petar.Avramovic updated the diff for D73216: [MIPS GlobalISel] Select population count (popcount).

Add check that OrigType is scalar and NarrowTy == OrigType/2. Fix build unmerge.

Jan 23 2020, 2:53 AM · Restricted Project
Petar.Avramovic updated the diff for D73215: [MIPS GlobalISel] Select count trailing zeros.

Add check that OrigType is scalar and NarrowTy == OrigType/2. Fix build unmerge.

Jan 23 2020, 2:48 AM · Restricted Project
Petar.Avramovic updated the diff for D73214: [MIPS GlobalISel] Select count leading zeros.

Add check that OrigType is scalar and NarrowTy == OrigType/2. Fix build unmerge.

Jan 23 2020, 2:48 AM · Restricted Project

Jan 22 2020

Petar.Avramovic created D73215: [MIPS GlobalISel] Select count trailing zeros.
Jan 22 2020, 10:14 AM · Restricted Project
Petar.Avramovic created D73216: [MIPS GlobalISel] Select population count (popcount).
Jan 22 2020, 10:14 AM · Restricted Project
Petar.Avramovic created D73214: [MIPS GlobalISel] Select count leading zeros.
Jan 22 2020, 10:14 AM · Restricted Project

Jan 21 2020

Petar.Avramovic added inline comments to D70858: [GlobalISel][RFC] Importing insert/extract vector element patterns.
Jan 21 2020, 2:56 AM · Restricted Project

Jan 20 2020

Petar.Avramovic added a comment to D72034: [GlobalISel][RFC] Importing patterns with PtrValueType and nullptr.

Ping.

Jan 20 2020, 8:17 AM · Restricted Project
Petar.Avramovic updated the diff for D70858: [GlobalISel][RFC] Importing insert/extract vector element patterns.

Rebase and update.

Jan 20 2020, 8:17 AM · Restricted Project

Jan 13 2020

Petar.Avramovic accepted D72544: GlobalISel: Fix assertion on wide G_ZEXT sources.

LGTM.

Jan 13 2020, 2:41 AM · Restricted Project

Jan 3 2020

Petar.Avramovic added a comment to D72034: [GlobalISel][RFC] Importing patterns with PtrValueType and nullptr.

G_CONSTANT can already directly have a pointer type, so I don't see a reason that the extra G_INTTOPTR needs to be involved.

When I started this patch I thought the same. nullptr was translated like that some time ago, D44762 changed it to what we have now. NullPtrValue was meant to match IRTranslator's translation of llvm-ir null

Jan 3 2020, 1:32 AM · Restricted Project

Dec 31 2019

Petar.Avramovic created D72034: [GlobalISel][RFC] Importing patterns with PtrValueType and nullptr.
Dec 31 2019, 4:04 AM · Restricted Project

Dec 30 2019

Petar.Avramovic added a comment to D71363: [MIPS GlobalISel] Select bitreverse.

Buildbot failures depend on compiler used to build clang.
Problem was in order which new MachineInstructions get inserted into MachineFunction.
Generated assembler does the same thing, but regression tests require consistent behavior regardless of compiler used.
In:

return B.buildOr(Dst, B.buildLShr(Ty, B.buildAnd(Ty, Src, MaskLoNTo0), C_N),
                 B.buildAnd(Ty, B.buildShl(Ty, Src, C_N), MaskLoNTo0));

it is important which method was executed first since they insert MachineInstructions into MachineFunction. Order of execution:
gcc

B.buildAnd(Ty, B.buildShl(Ty, Src, C_N), MaskLoNTo0)
B.buildLShr(Ty, B.buildAnd(Ty, Src, MaskLoNTo0), C_N)
Dec 30 2019, 9:27 AM · Restricted Project
Petar.Avramovic committed rG98f72a5107ce: [MIPS GlobalISel] Select bitreverse. Recommit (authored by Petar.Avramovic).
[MIPS GlobalISel] Select bitreverse. Recommit
Dec 30 2019, 9:18 AM
Petar.Avramovic committed rGdbc136e0fe7e: [MIPS GlobalISel] Select bitreverse (authored by Petar.Avramovic).
[MIPS GlobalISel] Select bitreverse
Dec 30 2019, 2:35 AM
Petar.Avramovic closed D71363: [MIPS GlobalISel] Select bitreverse.
Dec 30 2019, 2:34 AM · Restricted Project
Petar.Avramovic committed rG94a24e7a401b: [MIPS GlobalISel] Select bswap (authored by Petar.Avramovic).
[MIPS GlobalISel] Select bswap
Dec 30 2019, 2:23 AM
Petar.Avramovic closed D71362: [MIPS GlobalISel] Select bswap.
Dec 30 2019, 2:23 AM · Restricted Project

Dec 18 2019

Petar.Avramovic added a comment to D70858: [GlobalISel][RFC] Importing insert/extract vector element patterns.

Ping.

Dec 18 2019, 6:18 AM · Restricted Project

Dec 12 2019

Petar.Avramovic added a comment to D71363: [MIPS GlobalISel] Select bitreverse.

This patch needs only bswap, I just checked and it worked fine for me, what was the error?

Dec 12 2019, 10:14 AM · Restricted Project
Petar.Avramovic updated the diff for D71363: [MIPS GlobalISel] Select bitreverse.

Forgot to run regression tests for amd.

Dec 12 2019, 6:29 AM · Restricted Project

Dec 11 2019

Petar.Avramovic added a child revision for D71362: [MIPS GlobalISel] Select bswap: D71363: [MIPS GlobalISel] Select bitreverse.
Dec 11 2019, 8:49 AM · Restricted Project
Petar.Avramovic added a parent revision for D71363: [MIPS GlobalISel] Select bitreverse: D71362: [MIPS GlobalISel] Select bswap.
Dec 11 2019, 8:49 AM · Restricted Project
Petar.Avramovic created D71363: [MIPS GlobalISel] Select bitreverse.
Dec 11 2019, 8:49 AM · Restricted Project
Petar.Avramovic created D71362: [MIPS GlobalISel] Select bswap.
Dec 11 2019, 8:46 AM · Restricted Project

Dec 9 2019

Petar.Avramovic updated the diff for D70858: [GlobalISel][RFC] Importing insert/extract vector element patterns.

Rebase and ping.

Dec 9 2019, 9:56 AM · Restricted Project

Dec 2 2019

Petar.Avramovic added inline comments to D70858: [GlobalISel][RFC] Importing insert/extract vector element patterns.
Dec 2 2019, 6:10 AM · Restricted Project
Petar.Avramovic updated the diff for D70858: [GlobalISel][RFC] Importing insert/extract vector element patterns.

Attempt to switch to insertelt and extractelt for mips. Simplified a few lines.

Dec 2 2019, 5:34 AM · Restricted Project

Nov 29 2019

Petar.Avramovic created D70858: [GlobalISel][RFC] Importing insert/extract vector element patterns.
Nov 29 2019, 7:48 AM · Restricted Project

Nov 28 2019

Petar.Avramovic accepted D70808: [mips] Check that features required by built-ins are enabled.

LGTM.

Nov 28 2019, 6:28 AM · Restricted Project

Nov 26 2019

Petar.Avramovic accepted D70648: [mips] Fix sc, scs, ll, lld instructions expanding.

LGTM.

Nov 26 2019, 4:24 AM · Restricted Project

Nov 25 2019

Petar.Avramovic added a comment to D70564: [GlobalISel] LegalizationArtifactCombiner: Fix a bug in tryCombineMerges.

With removed xfail from tests, this looks good to me. I would like to hear if other reviewers have comments.

Nov 25 2019, 7:47 AM · Restricted Project

Nov 22 2019

Petar.Avramovic added a comment to D70564: [GlobalISel] LegalizationArtifactCombiner: Fix a bug in tryCombineMerges.

RegbankSelect doesn't track newly created instruction and I had to set reg bank manually. Here is the patch that sets regbank for newly created COPY instructions

.

Nov 22 2019, 5:38 AM · Restricted Project

Nov 15 2019

Petar.Avramovic committed rG1f559353a782: [MIPS GlobalISel] Select andi, ori and xori (authored by Petar.Avramovic).
[MIPS GlobalISel] Select andi, ori and xori
Nov 15 2019, 2:43 AM
Petar.Avramovic closed D70185: [MIPS GlobalISel] Select andi, ori and xori.
Nov 15 2019, 2:43 AM · Restricted Project
Petar.Avramovic committed rGdda8e9554071: [MIPS GlobalISel] Select addiu (authored by Petar.Avramovic).
[MIPS GlobalISel] Select addiu
Nov 15 2019, 2:39 AM
Petar.Avramovic closed D70184: [MIPS GlobalISel] Select addiu.
Nov 15 2019, 2:38 AM · Restricted Project

Nov 14 2019

Petar.Avramovic accepted D70202: [mips] Enable `la` pseudo instruction on 64-bit arch.

Since n32 worked before, you could change

It accepts la pseudo instruction on 64-bit arch and just shows a warning.

It accepts la pseudo instruction on arch with 64-bit pointers and just shows a warning.

Nov 14 2019, 7:30 AM · Restricted Project

Nov 13 2019

Petar.Avramovic created D70185: [MIPS GlobalISel] Select andi, ori and xori.
Nov 13 2019, 8:00 AM · Restricted Project
Petar.Avramovic created D70184: [MIPS GlobalISel] Select addiu.
Nov 13 2019, 7:59 AM · Restricted Project

Nov 12 2019

Petar.Avramovic added a comment to D69513: [GlobalISel] Widen one type at the time for insert/extract vector elt.

I don't fully understand G_BUILD_VECTOR_TRUNC. Such opcode does not exist in llvm-ir and as such can only be created in legalizer or later (at the moment at least). The problem here is the context sensitive legality (we still avoid this) along side with type legality. e.g. types might be fine but we still can't select an instructions because vector is built from different virtual registers (so splat is not an option) and we should perform lower. At the current state of legalizer I don't think it is possible to have it legal for type and as such I planned to handle it with custom legalization by either context sensitive select or lower.

Nov 12 2019, 4:16 AM · Restricted Project
Petar.Avramovic added a comment to D69513: [GlobalISel] Widen one type at the time for insert/extract vector elt.

Ping.

Nov 12 2019, 12:45 AM · Restricted Project

Nov 6 2019

Petar.Avramovic accepted D69851: [mips] Write `AFL_EXT_OCTEONP` flag to the `.MIPS.abiflags` section.

LGTM.

Nov 6 2019, 8:08 AM · Restricted Project
Petar.Avramovic accepted D69850: [mips] Support `octeon+` CPU in the `.set arch=` directive.

LGTM.

Nov 6 2019, 8:08 AM · Restricted Project
Petar.Avramovic accepted D69849: [mips] Implement Octeon+ `saa` and `saad` instructions.

Correction from previous comment, tests for SaaAddr and SaadAddr are already present.

Nov 6 2019, 7:59 AM · Restricted Project

Nov 5 2019

Petar.Avramovic added a comment to D69849: [mips] Implement Octeon+ `saa` and `saad` instructions.

Missing test for SaaAddr and SaadAddr.

Nov 5 2019, 10:38 AM · Restricted Project

Nov 4 2019

Petar.Avramovic added a comment to D69513: [GlobalISel] Widen one type at the time for insert/extract vector elt.

I have just saw these two asserts that forbid different types of vector scalar and element scalar
https://github.com/llvm/llvm-project/blob/a0324e911374441151903ed0d828e0fc1994c167/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp#L1090
https://github.com/llvm/llvm-project/blob/a0324e911374441151903ed0d828e0fc1994c167/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp#L1100
Widen scalar change does not trigger asserts since it only changes operand instead of making new instruction. How do we approach this issue then?
Btw, based on G_ZEXTLOAD and G_SEXTLOAD, are G_SEXT_EXTRACT_VECTOR_ELT and G_ZEXT_EXTRACT_VECTOR_ELT a consideration?
They would have different element scalar then vector scalar.

Nov 4 2019, 7:31 AM · Restricted Project
Petar.Avramovic added a comment to D69513: [GlobalISel] Widen one type at the time for insert/extract vector elt.

I don't understand the motivation.
The vector element and insert element type need to match, but it appears there's a missing verifier check

This is definitely true for llvm-ir insertelement and extractvalue.
But SDAG nodes ISD::INSERT_VECTOR_ELT and ISD::EXTRACT_VECTOR_ELT don't follow this,
Mips uses DAGTypeLegalizer::PromoteIntegerResult for i8 and i16 and promotes them to i32 leaving vector scalar type unchanged.
In .td file element being inserted/extracted has i32 operand type (for i8, i16 and i32) and instruction is selected based on vector type (v16i8, v8i16, v4i32).

Nov 4 2019, 4:05 AM · Restricted Project
Petar.Avramovic added a comment to D69711: [MIPS GlobalISel] Select MSA insert_vector_elt with immediate index.

D69513 goes first, following what SDAG does
%8:_(<16 x s8>) = G_INSERT_VECTOR_ELT %6:_, %7:_(s8), %5:_(s32)
should change only insert elt scalar type, and leave vector scalar type as is
%8:_(<16 x s8>) = G_INSERT_VECTOR_ELT %6:_, %7:_(s32), %5:_(s32) (in function: insert_i8)
insert instruction is selected based on vector type, inserted scalar is always i32 (i32 or i64 for mips64)

Nov 4 2019, 1:29 AM · Restricted Project

Nov 1 2019

Petar.Avramovic added a child revision for D69711: [MIPS GlobalISel] Select MSA insert_vector_elt with immediate index: D69712: [MIPS GlobalISel] Select MSA insert_vector_elt with variable index.
Nov 1 2019, 6:44 AM · Restricted Project
Petar.Avramovic added a parent revision for D69712: [MIPS GlobalISel] Select MSA insert_vector_elt with variable index: D69711: [MIPS GlobalISel] Select MSA insert_vector_elt with immediate index.
Nov 1 2019, 6:44 AM · Restricted Project
Petar.Avramovic created D69712: [MIPS GlobalISel] Select MSA insert_vector_elt with variable index.
Nov 1 2019, 6:44 AM · Restricted Project