Abandoned because of https://reviews.llvm.org/D47825

Abandoned because of https://reviews.llvm.org/D49242

This problem was fixed:

commit 2cd9451d45d2cfd560395c25c12d27d8f6090d1b
Date:   Thu Jun 7 11:09:05 2018 +0000

In D36991#1760268, @avl wrote:

Hi Konstantin, yes, I had in mind something like this. Unfortunately, I noticed your answer after D70652 was integrated : https://reviews.llvm.org/rGe73f78acd34360f7450b81167d9dc858ccddc262

In D36991#1749597, @avl wrote:

@kbelochapka Hi Konstantin, I am not sure whether you are still waiting for that review ... But if that is the case, Would you consider following comments, please ?

1. I think it would be better to limit checking for only "getFixupKindInfo(Fixup.getKind()).Flags && MCFixupKindInfo::FKF_IsPCRel" case. Since jrcxz/jecxz/jcxz instructions have only relative offset. i.e. report error for only PCRel fixups.

2. It also looks like check for offset needs to be limited to "IsResolved" case. Since if symbols are not resolved then actual offset is not known.

3. if not the #1 and #2 then use original assertion.

Hi Quentin,
The dead flag on those registers is not set because we do not run "Live Variable Analysis" pass on -O0 optimization level.
We can add Live Variable Analysis pass prior of execution of Fast Register Allocator pass, but this will cause ~59 LIT tests to fail.
At the same time, in some situations the produced assembler code is more clean, does not contain unnecessary register spills.
And I am not sure can this potentially affect a code debuggability or not.
What would be your suggestion? Shall we add Live Variable Analysis pass on -O0?

In D43544#1014102, @lebedev.ri wrote:

Test?

In D43542#1013969, @MatzeB wrote:

Since a "naked" function can only have nothing but "asm" statements inside, and those "asm" statements can not have input or output parameters, it is safe to just disable any registers spilling for a "naked" function.

Do naked functions have vregs at all then? Could we just skip the whole register allocation process in runOnMachineFunction() instead?

Four instructions perhaps:

vextractf128, vextractf128, vshufps, vblendps?

It is better than current six instructions.

Hi Craig, I placed simple test on the Bugzilla, your fix seems to be working fine.
The only thing, there are couple or more of shuffle masks which looks like they can be a subject of the similar optimization, but the generated code for them remained not optimized.
IN0: |0|1| | |4|5| | |
IN1: |8|9| | | | |E|F|
MASK011: 0,1,4,5,8,9,14,15
IN0: |0|1| | | | |6|7|
IN1: |8|9| | |C|D| | |
MASK012: 0,1,6,7,8,9,12,13

can you add a test for "128 bit line swapped" shuffle masks: [8, 10, 12, 14, 0, 2, 4, 6,], [9, 11, 13, 15, 1, 3, 5, 7 ]

currently you call lowerVectorShuffleSplitLowHigh() form lowerV8F32VectorShuffle() only.

Reimplemented the fix based on the reviewers recommendations.
Now the fix makes an attempt to transform sequence :
SHUFFLE<T0>(MASK) --> BITCACT<T1> --> BINOP<T1> --> BITCAST<T0> --> SHUFFLE<T0>(MASK)
into:
BITCAST<T1> --> BINOP<T1> --> SHUFFLE<T1>(NEW_MASK)
It is always possible when sizeof of BINOP vector element type is smaller than sizeof of SHUFFLE vector element type,
and sometimes is possible when it is not.

Thanks guys for valuable comments, will reimplementing the fix as suggested by Sanyaj.

Simon, can you please take a second look at this one when you have a chance.

Craig, can you please when you have chance, review the update that I had made for the initial fix of the bug.

Updates the fix to support 32bit mode, moved all non 64 bit tests into shift-double.ll

Closing bug PR24319 https://bugs.llvm.org/show_bug.cgi?id=24319 because your fix had fixed this bug as well.

Reimplemented fixup overflow check, treat PC relative fixup values as signed values and absolute fixup values as unsigned values.

The performance measurement testing did not show any performance benefit for the proposed 8bit bit reversal intrinsic implementation over the existing one.

treat PC relative fixups as signed values and absolute fixups as unsigned values

as was pointed by Craig, corrected isIntN() argument mistake

limit showing error message only to the cases that require copy of non floating point datum into MVT::f80 container.

test regenerated with update_llc_test_checks.py, unnecessary artifacts removed.

updated poorly formated diff file

replaced llc option -mcpu for -mtriple, the diff file reformatted

fix now works for 32bit mode, the test updated from crash checking to positive