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Wed, Dec 7

asi-sc added reviewers for D138660: [MachineCombiner][RISCV] Support inverse instructions reassociation: craig.topper, asb.

Since we've moved RISCV reassociation implementation to generic machine combiner mechanism D138302 and added reassociation of inverse instructions to machine combiner in D136754, we now can enable reassociation of inverse for RISCV.

Wed, Dec 7, 8:46 AM · Restricted Project, Restricted Project
asi-sc updated the summary of D138660: [MachineCombiner][RISCV] Support inverse instructions reassociation.
Wed, Dec 7, 8:31 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D138660: [MachineCombiner][RISCV] Support inverse instructions reassociation.

Add tests to cover fadd/fsub reassociation; rebase

Wed, Dec 7, 4:21 AM · Restricted Project, Restricted Project
asi-sc committed rGf8ed7093452a: [MachineCombiner] Extend reassociation logic to handle inverse instructions (authored by asi-sc).
[MachineCombiner] Extend reassociation logic to handle inverse instructions
Wed, Dec 7, 2:51 AM · Restricted Project, Restricted Project
asi-sc closed D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.
Wed, Dec 7, 2:51 AM · Restricted Project, Restricted Project

Tue, Dec 6

asi-sc planned changes to D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.

Thanks for your feedback, Philip. I'll made some experiments with this change at my free time, so not abandoning it right now. However, I mark it as "plan changes" to remove it from review queues.

Tue, Dec 6, 7:30 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.

Address review comments

Tue, Dec 6, 1:09 AM · Restricted Project, Restricted Project

Fri, Dec 2

asi-sc updated the diff for D138660: [MachineCombiner][RISCV] Support inverse instructions reassociation.

sync changes with parent revision, rebase

Fri, Dec 2, 8:04 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.

Change Optional to std::optional, rebase

Fri, Dec 2, 8:02 AM · Restricted Project, Restricted Project
asi-sc added a comment to D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.

@reames , could you please take a look at my previous comment? If you still think we should proceed with the minimized version you made, will you drive the review process? I don't see any progress there for three weeks.

Fri, Dec 2, 5:05 AM · Restricted Project, Restricted Project
asi-sc committed rGa8a376cbc996: [RISCV] Add correct predicate over FMV instructions (authored by kv-sc).
[RISCV] Add correct predicate over FMV instructions
Fri, Dec 2, 2:46 AM · Restricted Project, Restricted Project
asi-sc closed D139105: [RISCV] Add correct predicate over FMV instructions.
Fri, Dec 2, 2:46 AM · Restricted Project, Restricted Project

Thu, Dec 1

asi-sc committed rGa21bbc24d306: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it… (authored by asi-sc).
[MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it…
Thu, Dec 1, 5:32 AM · Restricted Project, Restricted Project
asi-sc closed D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV.
Thu, Dec 1, 5:32 AM · Restricted Project, Restricted Project
asi-sc added inline comments to D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV.
Thu, Dec 1, 4:16 AM · Restricted Project, Restricted Project

Fri, Nov 25

asi-sc added inline comments to D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.
Fri, Nov 25, 2:13 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.

Address comments: pass bool flag to isAssociativeAndCommutative

Fri, Nov 25, 2:03 AM · Restricted Project, Restricted Project
asi-sc committed rG8e3545a64edb: [Debugify] Accumulate the number of variables in debugify metadata (authored by asi-sc).
[Debugify] Accumulate the number of variables in debugify metadata
Fri, Nov 25, 12:05 AM · Restricted Project, Restricted Project
asi-sc closed D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Fri, Nov 25, 12:04 AM · Restricted Project, Restricted Project

Thu, Nov 24

asi-sc updated the diff for D136949: [Debugify] Accumulate the number of variables in debugify metadata.

Fix the test

Thu, Nov 24, 8:41 AM · Restricted Project, Restricted Project
asi-sc reopened D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Thu, Nov 24, 8:41 AM · Restricted Project, Restricted Project
asi-sc added a comment to D136949: [Debugify] Accumulate the number of variables in debugify metadata.

I had to revert the change as I mistakenly forgot to strip the test from various x86 info such as regs, etc. So, almost all targets failed to run the test correctly. I'll update it soon.

Thu, Nov 24, 8:22 AM · Restricted Project, Restricted Project
asi-sc added a reverting change for rGa1bbe8a4e2e5: [Debugify] Accumulate the number of variables in debugify metadata: rG5e04d8b72e84: Revert "[Debugify] Accumulate the number of variables in debugify metadata".
Thu, Nov 24, 8:10 AM · Restricted Project, Restricted Project
asi-sc committed rG5e04d8b72e84: Revert "[Debugify] Accumulate the number of variables in debugify metadata" (authored by asi-sc).
Revert "[Debugify] Accumulate the number of variables in debugify metadata"
Thu, Nov 24, 8:10 AM · Restricted Project, Restricted Project
asi-sc added a reverting change for D136949: [Debugify] Accumulate the number of variables in debugify metadata: rG5e04d8b72e84: Revert "[Debugify] Accumulate the number of variables in debugify metadata".
Thu, Nov 24, 8:10 AM · Restricted Project, Restricted Project
asi-sc committed rGa1bbe8a4e2e5: [Debugify] Accumulate the number of variables in debugify metadata (authored by asi-sc).
[Debugify] Accumulate the number of variables in debugify metadata
Thu, Nov 24, 7:50 AM · Restricted Project, Restricted Project
asi-sc closed D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Thu, Nov 24, 7:50 AM · Restricted Project, Restricted Project
asi-sc committed rG0a77ff41da42: [Debugify] Precommit test for D136949 (authored by asi-sc).
[Debugify] Precommit test for D136949
Thu, Nov 24, 7:18 AM · Restricted Project, Restricted Project
asi-sc added a comment to D138660: [MachineCombiner][RISCV] Support inverse instructions reassociation.

This patch is created to demonstrate the approach. So, I'm intentionally didn't add reviewers. However, it's possible that we'll follow the path this patch shows, so I don't abandon it immediately.

Thu, Nov 24, 5:15 AM · Restricted Project, Restricted Project
asi-sc added inline comments to D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.
Thu, Nov 24, 5:08 AM · Restricted Project, Restricted Project
asi-sc requested review of D138660: [MachineCombiner][RISCV] Support inverse instructions reassociation.
Thu, Nov 24, 4:47 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.

Address review comments:

  • fix typos
  • merge hasInverseOpcode and getInverseOpcode
  • drop mentions of mul/div reassociation
Thu, Nov 24, 4:44 AM · Restricted Project, Restricted Project
asi-sc committed rG9ee8d2e081d2: [Debugify] Strip llvm.mir.debugify metadata (authored by asi-sc).
[Debugify] Strip llvm.mir.debugify metadata
Thu, Nov 24, 1:28 AM · Restricted Project, Restricted Project
asi-sc closed D138417: [Debugify] Strip llvm.mir.debugify metadata.
Thu, Nov 24, 1:28 AM · Restricted Project, Restricted Project
asi-sc committed rG782196409a49: [Debugify] Add precommit test for D138417 (authored by asi-sc).
[Debugify] Add precommit test for D138417
Thu, Nov 24, 1:20 AM · Restricted Project, Restricted Project

Wed, Nov 23

asi-sc updated the diff for D136949: [Debugify] Accumulate the number of variables in debugify metadata.

Rebased and added test checks to make forward progress on the review.

Wed, Nov 23, 2:01 AM · Restricted Project, Restricted Project

Tue, Nov 22

asi-sc added a comment to D136949: [Debugify] Accumulate the number of variables in debugify metadata.

Yes, We use XFAIL to mark a test as an expected failure. An XFAIL test will be successful if its execution fails, and will be a failure if its execution succeeds.
But now we are not expected failure. it is strange to test a test case by check nothing (only expect it not go to assert). I am not much sure about it.
@dsanders any suggestions ?

Tue, Nov 22, 10:58 PM · Restricted Project, Restricted Project
asi-sc committed rG95ef005230e9: [RISCV][NFC] Mark rs1 in most memory instructions as memory operand. (authored by dybv-sc).
[RISCV][NFC] Mark rs1 in most memory instructions as memory operand.
Tue, Nov 22, 5:44 AM · Restricted Project, Restricted Project
asi-sc closed D136847: [RISCV][NFC] Mark rs1 in most memory instructions as memory operand..
Tue, Nov 22, 5:44 AM · Restricted Project, Restricted Project
asi-sc added inline comments to D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Tue, Nov 22, 1:20 AM · Restricted Project, Restricted Project
asi-sc added inline comments to D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Tue, Nov 22, 12:07 AM · Restricted Project, Restricted Project

Mon, Nov 21

asi-sc added reviewers for D138417: [Debugify] Strip llvm.mir.debugify metadata: dsanders, xiangzhangllvm, vsk.
Mon, Nov 21, 4:41 AM · Restricted Project, Restricted Project
asi-sc requested review of D138417: [Debugify] Strip llvm.mir.debugify metadata.
Mon, Nov 21, 4:35 AM · Restricted Project, Restricted Project
asi-sc added inline comments to D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Mon, Nov 21, 2:57 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136949: [Debugify] Accumulate the number of variables in debugify metadata.

Add a test, address review comments

Mon, Nov 21, 2:52 AM · Restricted Project, Restricted Project
asi-sc committed rGfb47bb37e4fe: [MachineTraceMetrics] Pick the trace successor for an entry block (authored by asi-sc).
[MachineTraceMetrics] Pick the trace successor for an entry block
Mon, Nov 21, 2:12 AM · Restricted Project, Restricted Project
asi-sc closed D138272: [MachineTraceMetrics] Pick the trace successor for an entry block.
Mon, Nov 21, 2:11 AM · Restricted Project, Restricted Project
asi-sc committed rG0c22cdfdd1bf: [MachineTraceMetrics] Precommit test for D138272 (authored by asi-sc).
[MachineTraceMetrics] Precommit test for D138272
Mon, Nov 21, 1:56 AM · Restricted Project, Restricted Project

Fri, Nov 18

asi-sc added a comment to D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.

@craig.topper , may I ask you to take a look at the questions from my previous comment (https://reviews.llvm.org/D136754#3898721) ? It'll help me to resolve original comments properly.

Fri, Nov 18, 11:42 AM · Restricted Project, Restricted Project
asi-sc added inline comments to D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV.
Fri, Nov 18, 11:29 AM · Restricted Project, Restricted Project
asi-sc added reviewers for D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV: craig.topper, reames, frasercrmck.
Fri, Nov 18, 11:24 AM · Restricted Project, Restricted Project
asi-sc requested review of D138302: [MachineCombiner][RISCV] Make hasReassociableSibling virtual and override it for RISCV.
Fri, Nov 18, 8:09 AM · Restricted Project, Restricted Project
asi-sc added reviewers for D138272: [MachineTraceMetrics] Pick the trace successor for an entry block: fhahn, jroelofs, ThomasRaoux.
Fri, Nov 18, 2:34 AM · Restricted Project, Restricted Project
asi-sc requested review of D138272: [MachineTraceMetrics] Pick the trace successor for an entry block.
Fri, Nov 18, 1:54 AM · Restricted Project, Restricted Project

Thu, Nov 17

asi-sc committed rGb6c790736e77: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns (authored by asi-sc).
[MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns
Thu, Nov 17, 2:29 AM · Restricted Project, Restricted Project
asi-sc closed D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.
Thu, Nov 17, 2:28 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.

Rebase to fetch precommitted tests

Thu, Nov 17, 1:15 AM · Restricted Project, Restricted Project
asi-sc committed rG374d07656357: [MachineCombiner][RISCV] Precommit tests for D136764 (authored by asi-sc).
[MachineCombiner][RISCV] Precommit tests for D136764
Thu, Nov 17, 1:14 AM · Restricted Project, Restricted Project

Wed, Nov 16

asi-sc added a comment to D136949: [Debugify] Accumulate the number of variables in debugify metadata.

A gentle ping

Wed, Nov 16, 7:57 AM · Restricted Project, Restricted Project
asi-sc added a comment to D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.

I do have a draft work that will improve machine combiner logic to deal with this problem. In my opinion, combining instructions that are separated by a call is a doubtful from performance point of view thing and we must do additional check in these situations. However, I don't see how we can fix it exactly in this patch. Do we agree that sometimes additional moves are inserted, their origin is clear, and the problem is likely to be addressed in further patches? I don't expect major performance issues caused by exactly this behavior and didn't observe any. Or maybe there are any suggestions on how to address it in this patch?

Wed, Nov 16, 5:02 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.

Address review comments

Wed, Nov 16, 4:40 AM · Restricted Project, Restricted Project
asi-sc added a comment to D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.

Do you know why sin, cos and exp, sqrt seems to take longer?

Wed, Nov 16, 2:25 AM · Restricted Project, Restricted Project

Tue, Nov 15

asi-sc added a comment to D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.

A gentle ping

Tue, Nov 15, 12:10 AM · Restricted Project, Restricted Project

Mon, Nov 14

asi-sc added a comment to D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.

I spent some time this morning creating a minimal version of this patch. This change is still too complicated, and I'm unconvinced of it's correctness. Please see https://reviews.llvm.org/D137856.

While doing this, I realize this change is definitely incorrect. Consider the following test case:
setvli x1, 5, <fixed lmul, flags>
vmv.v.i v8, -1
setvli x1, 1, <fixed lmul, flags>
vle8 v8, (a5) // memory contains an -1 vector
setvli x1, 5, <fixed lmul, flags>
vmseq v9, v8, -1

In this case, vle8 stands in for any instruction with a merge operand. The fact it's a load is not meant to be important.

The required semantics of this program is to produce a mask with five ones - regardless of the TA/TU status of the vle8. TA allows either the original value or -1, and in this case, both choices result in the same result.

However, this patch would produce the following:
setvli x1, 1, <fixed lmul, flags>
vmv.v.i v8, -1
setvli x1, 1, <fixed lmul, flags>
vle8 v8, (a5) // memory contains an -1 vector
setvli x1, 5, <fixed lmul, flags>
vmseq v9, v8, -1

In this case, lanes 1 through 4 (inclusive) are undefined, and may result in a mask without those lanes set. As such, the transform is unsound as currently implemented.

Mon, Nov 14, 12:57 AM · Restricted Project, Restricted Project

Fri, Nov 11

asi-sc added a comment to D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.

Ping

Fri, Nov 11, 12:49 AM · Restricted Project, Restricted Project

Nov 6 2022

asi-sc added a comment to D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.

Ping!

Nov 6 2022, 11:59 PM · Restricted Project, Restricted Project

Nov 2 2022

asi-sc committed rG0c1f9b3f17bc: [MachineCombiner] Add `const` to `shouldReduceRegisterPressure` arguments. NFC (authored by asi-sc).
[MachineCombiner] Add `const` to `shouldReduceRegisterPressure` arguments. NFC
Nov 2 2022, 2:49 AM · Restricted Project, Restricted Project
asi-sc closed D137174: [MachineCombiner] Add `const` to `shouldReduceRegisterPressure` arguments. NFC.
Nov 2 2022, 2:48 AM · Restricted Project, Restricted Project

Nov 1 2022

asi-sc added a reviewer for D137174: [MachineCombiner] Add `const` to `shouldReduceRegisterPressure` arguments. NFC: shchenz.
Nov 1 2022, 9:49 AM · Restricted Project, Restricted Project
asi-sc requested review of D137174: [MachineCombiner] Add `const` to `shouldReduceRegisterPressure` arguments. NFC.
Nov 1 2022, 9:48 AM · Restricted Project, Restricted Project
asi-sc committed rG92ec61498831: [GlobalISel] Compute debug location when merging stores more accurately (authored by asi-sc).
[GlobalISel] Compute debug location when merging stores more accurately
Nov 1 2022, 4:37 AM · Restricted Project, Restricted Project
asi-sc closed D136937: [GlobalISel] Compute debug location when merging stores more accurately.
Nov 1 2022, 4:36 AM · Restricted Project, Restricted Project
asi-sc added inline comments to D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.
Nov 1 2022, 4:06 AM · Restricted Project, Restricted Project
asi-sc committed rGa8085ffc924c: [GlobalISel] Precommit test for D136937 (authored by asi-sc).
[GlobalISel] Precommit test for D136937
Nov 1 2022, 2:52 AM · Restricted Project, Restricted Project

Oct 31 2022

asi-sc added a comment to D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.

A gentle ping

Oct 31 2022, 9:05 AM · Restricted Project, Restricted Project
asi-sc added a comment to D136937: [GlobalISel] Compute debug location when merging stores more accurately.

Thanks for fixing this, could you add a small test as well?

Oct 31 2022, 6:13 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136937: [GlobalISel] Compute debug location when merging stores more accurately.

Add a test

Oct 31 2022, 6:07 AM · Restricted Project, Restricted Project

Oct 28 2022

asi-sc added reviewers for D136949: [Debugify] Accumulate the number of variables in debugify metadata: dsanders, xiangzhangllvm.
Oct 28 2022, 8:31 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136949: [Debugify] Accumulate the number of variables in debugify metadata.

Erase old debugify metadata before revisiting the module

Oct 28 2022, 7:41 AM · Restricted Project, Restricted Project
asi-sc planned changes to D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Oct 28 2022, 7:24 AM · Restricted Project, Restricted Project
asi-sc requested review of D136949: [Debugify] Accumulate the number of variables in debugify metadata.
Oct 28 2022, 6:55 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.

Merge debug locations of the original instructions when creating new fused instruction.

Oct 28 2022, 5:12 AM · Restricted Project, Restricted Project
asi-sc added a reviewer for D136937: [GlobalISel] Compute debug location when merging stores more accurately: aemerson.
Oct 28 2022, 4:59 AM · Restricted Project, Restricted Project
asi-sc requested review of D136937: [GlobalISel] Compute debug location when merging stores more accurately.
Oct 28 2022, 3:28 AM · Restricted Project, Restricted Project

Oct 26 2022

asi-sc committed rG7bc7f2da763b: [UpdateTestChecks] Sync flags in update_mir_test_checks.py with MIFlags (authored by asi-sc).
[UpdateTestChecks] Sync flags in update_mir_test_checks.py with MIFlags
Oct 26 2022, 7:10 AM · Restricted Project, Restricted Project
asi-sc closed D136170: [UpdateTestChecks] Sync flags in update_mir_test_checks.py with MIFlags.
Oct 26 2022, 7:09 AM · Restricted Project, Restricted Project
asi-sc added a comment to D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.

Do we have any benefits in doing this? The diff in tests just show a swap of 2 source operands, which I think might have no impact to the performance.

Oct 26 2022, 7:04 AM · Restricted Project, Restricted Project
asi-sc added reviewers for D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns: craig.topper, reames, frasercrmck.

Performance impact on Whetstone (double-precision) for sifive-u74 -march=rv64imafdc -O3 -funroll-loops -finline-functions -ffast-math -DDP -mtune=sifive-u74:
N1 +67%
N2 +45%
MWIPS +18%

Oct 26 2022, 6:36 AM · Restricted Project, Restricted Project
asi-sc requested review of D136764: [MachineCombiner][RISCV] Add fmadd/fmsub/fnmsub instructions patterns.
Oct 26 2022, 6:14 AM · Restricted Project, Restricted Project
asi-sc updated the diff for D136170: [UpdateTestChecks] Sync flags in update_mir_test_checks.py with MIFlags.

Rebase after precommit test is merged.

Oct 26 2022, 5:54 AM · Restricted Project, Restricted Project
asi-sc committed rG16fb9150beb4: [UpdateTestChecks] Precommit test for D136170 (authored by asi-sc).
[UpdateTestChecks] Precommit test for D136170
Oct 26 2022, 5:52 AM · Restricted Project, Restricted Project
asi-sc added reviewers for D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions: Carrot, dmgreen, craig.topper, spatel, shchenz.

Some support of add-sub reassociation was added to AArch64 in D124564. This patch generalizes this idea and makes implementation target-independent.

Oct 26 2022, 5:09 AM · Restricted Project, Restricted Project
asi-sc requested review of D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions.
Oct 26 2022, 3:28 AM · Restricted Project, Restricted Project

Oct 25 2022

asi-sc added a reviewer for D136170: [UpdateTestChecks] Sync flags in update_mir_test_checks.py with MIFlags: nhaehnle.
Oct 25 2022, 3:05 AM · Restricted Project, Restricted Project

Oct 24 2022

asi-sc updated the diff for D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.

Add a whitelist for merge operands, remove use-walk support

Oct 24 2022, 2:51 AM · Restricted Project, Restricted Project

Oct 21 2022

asi-sc added inline comments to D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.
Oct 21 2022, 9:17 AM · Restricted Project, Restricted Project
asi-sc planned changes to D130895: [RISCV] Make VL choosing for a splat-like VMV based on its users.
Oct 21 2022, 9:04 AM · Restricted Project, Restricted Project
asi-sc committed rG14a5b9cdaefe: [MachineCombiner][RISCV] Relax optimization level requirement (authored by asi-sc).
[MachineCombiner][RISCV] Relax optimization level requirement
Oct 21 2022, 3:37 AM · Restricted Project, Restricted Project
asi-sc closed D136339: [MachineCombiner][RISCV] Relax optimization level requirement.
Oct 21 2022, 3:36 AM · Restricted Project, Restricted Project

Oct 20 2022

asi-sc added a comment to D136170: [UpdateTestChecks] Sync flags in update_mir_test_checks.py with MIFlags.

I added a test to check nofpexcept flag. I didn't find a way to add a test for nomerge flag as for now we do not have instructions that may have this flag and return a result simultaneously. @zequanwu may correct me.

Oct 20 2022, 6:38 AM · Restricted Project, Restricted Project