One comment but otherwise LGTM.
Wed, Jul 8
I think we are really close now. I would suggest having a second lit test, which we link into either a static exec or pie exec which has calls using the R_PPC64_REL24_NOTOC relocation to symbols with global linkage and default visibility. I think it can be done with a single file (ie define all the callers and callees in the same file, no need for a second input file).
Fri, Jul 3
Thu, Jul 2
Patch looks very good Victor. I've left a couple minor comments in the implementation. I have a few suggestions in relation to the testing.
Tue, Jun 30
LGTM. Thank Stefan.
Mon, Jun 29
Thu, Jun 25
Wed, Jun 24
Looks good Zarko. I think we should either flip this over to show the stack growing down, or keep it as is but add High Memory at the bottom and Low memory at the top to show the stack grows downwards.
Tue, Jun 23
Abandoning based on the discussion in D81457.
Fri, Jun 19
Do you want to add a test for overflow of a 34-bit value?
Thu, Jun 18
Wed, Jun 17
Tue, Jun 16
Mon, Jun 15
Shall we mask out the bits (keep existing (read32(loc) & ~mask))? If other relocations don't behave this way, let's fix it. Writing zeros to the bits is a courtesy of the assembly but should we make use of the assumption? PPC64 is a RELA target and for an RELA target the implicit addend should be relied upon. AArch64.cpp masks out the bits as well.
Thu, Jun 11
The CHECK-O section prints out the relocation and then it has symbol+<addend>. Is that what you are looking for?
Yeah, not sure how I missed that the first time. Sorry.
Jun 5 2020
Minor nit not related to this patch is that the test is really noisy. I realize this is the assembly clang emits, but a lit test can be cleaned up to just the needed constructs. Removing the comments, zero padding after the functions, local aliases (.Lexternal$local) and finally the size directives and the labels that are only needed for those directives goes along way in creating a much simpler test that helps to highlight exactly what functionality is being exercised at a glance. After landing this patch can you do an NFC cleanup of the test?
Jun 3 2020
Do you already have a test which dumps the relocations and verifies the addend on the relocations? (Do the llvm tools support dumping these new relocations?)
May 29 2020
May 26 2020
One comment but otherwise LGTM.
May 25 2020
May 21 2020
Thanks for implementing this MaskRay. I've left a couple comments, but still need to go through the testing.
May 15 2020
May 14 2020
May 11 2020
rebased to pick up NFC commit.
- Removed extra whitespace.
- Removed redundant testing (of fprs saves)
May 8 2020
May 7 2020
May 6 2020
👍 Thanks for trying this out Digger, I think this approach is the right one to take. I've had an initial look and left a few comments inline. I'll need to spend some time understanding ExternalSymbolSDNodes a bit better before being able to review the patch thoroughly enough to approve.
May 4 2020
Updated aix-calleesaved.ll test.
May 1 2020
Apr 30 2020
One minor comment but otherwise LGTM. Thanks for fixing this.
Apr 29 2020
@sfertile Your revert does not include Differential Revision: . I guess if it included, the revision would be automatically re-opened, and Commits: would list the associated revert commits.
Have you considered not transforming ExternalSymbolSDNodes, but instead supporting them for AIX and then creating the symbol and emitting the linkage for the ExternalSymbol machine operand in the ASMPrinter? The approach this patch takes adds complexity to a target independent part of the MC infrastructure. The amount of complexity it adds is not unreasonable, but I think if we can contain the complexity to the PowerPC backend its worth considering strongly even if the implementation there is more difficult.
I had to pull this as it breaks the PPC mutlistage LLD bot. Consider the following input:
Apr 28 2020
LGTM. Unfortunately a more general solution looks to be quite difficult/intrusive and I'm not sure if it is worth it.
Apr 27 2020
Sorry about delocate. It is profoundly weird, motivated purely by compliance with FIPS regulations, and we don't want it to cause any problems.
Apr 22 2020
Thanks. I'm reading through the docs you linked and will have a look at the delocate tool.
Apr 21 2020
Interesting. I wasn't aware that taking the address of a toc entry was allowed when I implemented the toc-optimizations 😦 . I'm not sure we can peek at just the next relocation though to see if we can optimize or not. For example consider:
Apr 20 2020
Apr 17 2020
Apr 16 2020
Fix unintended white space change.
Apr 15 2020
Thanks for the test updates. LGTM.
Apr 14 2020
Apr 13 2020
Apr 9 2020
A couple minor comments, but patch is almost ready otherwise.
Apr 8 2020
LGTM now, but pls hold on for some days in case others have more comments.
LGTM too. Not a bad idea, but maybe give a days grace instead of a few days.
Apr 7 2020
Can you make this dependent on https://reviews.llvm.org/D76902and rebase/repost.
Apr 6 2020
- rebase to pick up landed dependencies.
- Moved assertion that loop index was still valid to top of loop.
- added a test that exercise fatal error for args split between registers and stack.
Which I think mishandles negative values.
run clang-format, but otherwise for fixing the assertion it LGTM. FWIW I'm not sure the code we produce for the conversion handles negative numbers correctly. For the reduced IR I posted I get: