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steven.zhang accepted D77624: [PowerPC] Update alignment for ReuseLoadInfo in LowerFP_TO_INTForReuse.

LGTM now, but pls hold on for some days in case others have more comments.

Tue, Apr 7, 7:37 PM · Restricted Project
steven.zhang added inline comments to D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.
Tue, Apr 7, 2:40 AM · Restricted Project

Mon, Apr 6

steven.zhang added inline comments to D77624: [PowerPC] Update alignment for ReuseLoadInfo in LowerFP_TO_INTForReuse.
Mon, Apr 6, 10:52 PM · Restricted Project
steven.zhang added inline comments to D77624: [PowerPC] Update alignment for ReuseLoadInfo in LowerFP_TO_INTForReuse.
Mon, Apr 6, 10:20 PM · Restricted Project
steven.zhang added inline comments to D77624: [PowerPC] Update alignment for ReuseLoadInfo in LowerFP_TO_INTForReuse.
Mon, Apr 6, 8:10 PM · Restricted Project

Fri, Apr 3

steven.zhang added a comment to D76638: [SDAG] fix crash in getNegatedExpression() by ignoring transient fadd.

Ping. I think this change is useful regardless of whether/how we make a larger fix for getNegatibleCost+getNegatedExpression.

I have posted a patch(https://reviews.llvm.org/D77319) to remove the getNegatibleCost. It is almost ready now. I am not sure if it is the best way , and welcome for the comments in advance. Regarding to the opportunities for this patch, can you double confirm it together with my patch to see if there is any improvement ?

Thanks for improving it!
I'm seeing something interesting with that patch applied for the test that is currently crashing - we re-use a common term in the equation, so that eliminates an instruction. For PPC, it looks like this:

xssubsp f0, f1, f2
xsmulsp f2, f0, f3
xssubsp f0, f3, f0
xsresp f4, f2
xsmulsp f1, f0, f4
xsnmsubasp f0, f2, f1
xsmaddasp f1, f4, f0

But this seems to just be a lucky case because the other test (which is the same math except the fdiv operands are reversed) is not affected:

xssubsp f0, f1, f2
xssubsp f1, f2, f1
xsmulsp f0, f0, f3
xsaddsp f3, f1, f3
xsresp f2,f 0
xsmulsp f1, f3, f2
xsnmsubasp f3, f0, f1
xsmaddasp f1, f2, f3
Fri, Apr 3, 1:34 AM
steven.zhang updated the summary of D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.
Fri, Apr 3, 1:02 AM · Restricted Project
steven.zhang updated the summary of D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.
Fri, Apr 3, 1:02 AM · Restricted Project
steven.zhang added a comment to D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.

Can you split whatever change affects the PPC tests into a separate patch, if it's not too tricky?

Yes, I am trying to do it, and that is the main reason why this revision is in WIP status. It seems that we have different combine order for that case that result in different combination result, though they are semantics the same. I will take a deep look at this.

Fri, Apr 3, 1:02 AM · Restricted Project
steven.zhang retitled D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression from [WIP] Remove the getNegatibleCost to [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.
Fri, Apr 3, 1:02 AM · Restricted Project

Thu, Apr 2

steven.zhang added a comment to D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.

Can you split whatever change affects the PPC tests into a separate patch, if it's not too tricky?

Thu, Apr 2, 7:00 PM · Restricted Project
steven.zhang updated the diff for D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.

Keep the NegatibleCost and change its enum value to make it consistent with its semantics. CostX < CostY means the cost of negated X is cheaper than Y.

Thu, Apr 2, 7:00 PM · Restricted Project
steven.zhang accepted D77208: [PowerPC] Remove unnecessary XSRSP instruction in MI peephole.

LGTM as far as you address Amy's comments.

Thu, Apr 2, 5:54 PM · Restricted Project
steven.zhang added a comment to D76638: [SDAG] fix crash in getNegatedExpression() by ignoring transient fadd.

Ping. I think this change is useful regardless of whether/how we make a larger fix for getNegatibleCost+getNegatedExpression.

Thu, Apr 2, 10:17 AM
steven.zhang created D77319: [DAGCombine] Remove the getNegatibleCost to avoid the out of sync with getNegatedExpression.
Thu, Apr 2, 9:44 AM · Restricted Project

Wed, Apr 1

steven.zhang added a comment to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

Make sense. I will update the patch. Thank you for the comments.

Wed, Apr 1, 3:18 AM · Restricted Project
steven.zhang added a comment to D76909: [MachineScheduler] Update available queue on the first mop of a new cycle.

LGTM on the power side changes, as no perf regression found with this change. I will leave others to accept this patch as I am not qualified to do.

Wed, Apr 1, 3:18 AM

Tue, Mar 31

steven.zhang added a comment to D77118: [PowerPC] Ignore implicit register operands for MCInst.

I think this is a good catch. InstAlias match the MI strictly including the implicit operands. We can either try to loose that check or remove the implicit operand when lowering the MI to MCInst, as it is not needed anymore. And please test this patch completely as this patch expose much more alias opportunities that didn't test before.

Tue, Mar 31, 1:37 AM · Restricted Project

Mon, Mar 30

steven.zhang committed rG4eeb56d08874: [PowerPC] Don't do the folding if the operand is R0/X0 (authored by steven.zhang).
[PowerPC] Don't do the folding if the operand is R0/X0
Mon, Mar 30, 8:14 PM
steven.zhang closed D77034: [PowerPC] Don't do the folding if the operand is R0/X0.
Mon, Mar 30, 8:13 PM · Restricted Project

Sun, Mar 29

steven.zhang added inline comments to D64193: [PowerPC] Add exception constraint to FP rounding operations.
Sun, Mar 29, 10:29 PM · Restricted Project
steven.zhang added a comment to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

@nemanjai Any more comments ?

Sun, Mar 29, 10:29 PM · Restricted Project
steven.zhang created D77034: [PowerPC] Don't do the folding if the operand is R0/X0.
Sun, Mar 29, 10:29 PM · Restricted Project

Fri, Mar 27

steven.zhang added a comment to D76909: [MachineScheduler] Update available queue on the first mop of a new cycle.

Can we guard it with getMicroOpBufferSize() == 0 to avoid the impact of the out of order CPU as you motivate this patch with inorder cpu ?

Fri, Mar 27, 3:10 AM

Thu, Mar 26

steven.zhang added a comment to D76585: [PowerPC] Require NSZ flag for c-a*b to FNMSUB.

@steven.zhang Can you please *Disable* or *Delete* the deprecated account @qshanz to avoid confusion. Thanks.

Thu, Mar 26, 9:12 PM · Restricted Project

Wed, Mar 25

steven.zhang committed rG1ef7bf412141: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul +… (authored by steven.zhang).
[PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul +…
Wed, Mar 25, 10:12 PM
steven.zhang closed D76751: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add.
Wed, Mar 25, 10:12 PM · Restricted Project
steven.zhang accepted D76773: [PowerPC] Don't generate ST_VSR_SCAL_INT if power8-vector is disabled, fix PR45297.

LGTM. Please hold on for some days in case someone else has concern.

Wed, Mar 25, 9:39 PM · Restricted Project
steven.zhang updated the diff for D76751: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add.

Fix the pattern issue.

Wed, Mar 25, 4:17 AM · Restricted Project
steven.zhang added inline comments to D76751: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add.
Wed, Mar 25, 4:17 AM · Restricted Project

Tue, Mar 24

steven.zhang created D76751: [PowerPC] Improve the way legalize mul for v8i16 and add pattern to match mul + add.
Tue, Mar 24, 8:47 PM · Restricted Project
steven.zhang committed rG2488ea428d68: [NFC][Test][PowerPC] Add one test to verify the behavior of vector mul/add for… (authored by steven.zhang).
[NFC][Test][PowerPC] Add one test to verify the behavior of vector mul/add for…
Tue, Mar 24, 7:42 PM

Mon, Mar 23

steven.zhang updated the diff for D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

Address comments.

Mon, Mar 23, 9:13 PM · Restricted Project
steven.zhang added a comment to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

I think this would be immensely more readable if you use more descriptive names for variables. It is very hard to get this bit manipulation right in ones head so I really think you should try your best to make this as simple to follow as possible:

  1. You use one mask in on line 4463 and then a different one on 4476. Please don't do this. Stick with a consistent example.

Good catch.

  1. Rename RotateRightClearLeft to something like RightJustifyRangeAndClear as it appears that is what the function is doing.

In ISA, the RLDICL is named as: "Rotate Left Doubleword Immediate then Clear Left". I am not sure if the right justify range make it more clear. Regarding to left or right, it is just a wrap rotate. The lambda here is trying to hide the detail that implement the right rotate with left rotate. Personally, I prefer the RotateRightClearLeft one, but also ok to the RightJustifyRangeAndClear if you insist.

  1. Get rid of all the expressions involving ME/MB - especially things like <imm> +/- MB/ME as they are very difficult to reason about. For readability, favour defining temporary values just so they would have a name. For example: MB+63-ME is kind of meaningless to a reader. But if you do something like unsigned FirstBitSetWhenRightJustified = MB + 63 - ME; that is now much easier to follow. I realize that we are creating single-use temporaries this way, but I really think it is worth it for readability.

It is always a balance :) Agree that use the temp variable here as the rotate logic is indeed hard to follow.

The algorithm appears to be something along the lines of:

if (!MaskIsTwoContiguousRunsOfOnes)
  return
// Add Missing Bits On Left To The Mask
// Right Justify Mask And Clear Bits Formerly In The Middle
// Rotate Back And Clear Bits Previously Added On Left

And I think the comments, function names and variable names should make it clear that this is what is happening.

That is nice. Thank you.

Mon, Mar 23, 8:09 PM · Restricted Project
steven.zhang added a comment to D76439: [SDAG] fix crash in getNegatedExpression() from altered number of uses.

We need to update the cost as they are pair. For now, it returns the first operand immediately if it is not expensive. But it could be neutral. And we will have problems if the cost of second operand is cheap. Because we should return cheap, but now, it is neutral. Does it make sense ?

Sorry, but I'm not understanding. With this patch we have fneg (fmul/fdiv X, Y):

  1. CostX == cheaper == 2; CostY == cheaper == 2 --> negate X
  2. CostX == cheaper == 2; CostY == neutral == 1 --> negate X
  3. CostX == neutral == 1; CostY == cheaper ==2 --> negate Y
  4. CostX == neutral == 1; CostY == neutral == 1 --> negate X

    But I have an alternate idea to avoid the crash that is probably a better fix given the current logic: D76638
Mon, Mar 23, 8:09 PM

Sun, Mar 22

steven.zhang added inline comments to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.
Sun, Mar 22, 8:56 PM · Restricted Project
steven.zhang updated the diff for D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

Address comments.

Sun, Mar 22, 8:25 PM · Restricted Project
steven.zhang added a comment to D76439: [SDAG] fix crash in getNegatedExpression() from altered number of uses.

We need to update the cost. For now, it returns the first operand immediately if it is not expensive. But it could be neutral. And we will have problems if the cost of second operand is cheap. Because we should return cheap, but now, it is neutral.

Sun, Mar 22, 7:20 PM

Thu, Mar 19

steven.zhang accepted D75821: [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr.

LGTM (but see if Nemanjai(@nemanjai ) has comments)

Thu, Mar 19, 7:45 PM · Restricted Project
steven.zhang added a comment to D76439: [SDAG] fix crash in getNegatedExpression() from altered number of uses.

Shall we also need to update the cost evaluation for FMUL/FDIV, that is calculating both operands and select the cheapest cost of them ? And it seems that FADD also have such issues. -(A+B)->-A - B or -B-A
Technical speaking, we can't have the same expensive cost for both operands when negating the expression but now, we indeed have sometimes. And we choose one by chance which also would have problems.

Thu, Mar 19, 7:14 PM

Wed, Mar 18

steven.zhang added a comment to D75895: [PowerPC] Select the select_cc for f64/f32 as set_cc + vselect if VSX enabled.

ping

Wed, Mar 18, 9:42 PM · Restricted Project
steven.zhang accepted D76265: [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC.

LGTM now.

Wed, Mar 18, 1:04 AM · Restricted Project
steven.zhang added inline comments to D76265: [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC.
Wed, Mar 18, 12:31 AM · Restricted Project

Tue, Mar 17

steven.zhang added inline comments to D76265: [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC.
Tue, Mar 17, 11:13 PM · Restricted Project
steven.zhang added a comment to D76265: [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC.

I don't think this is a NFC patch as you are adding hook for IR version.

The IR hook does not have any caller like NFC patches only adding a helper function without any caller?

Tue, Mar 17, 10:41 PM · Restricted Project
steven.zhang added a comment to D76265: [PowerPC] add IR level isFMAFasterThanFMulAndFAdd - NFC.

I don't think this is a NFC patch as you are adding hook for IR version.

Tue, Mar 17, 9:06 PM · Restricted Project
steven.zhang committed rGd577193c0f74: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d (authored by steven.zhang).
[DAGCombine] Respect the uses when combine FMA for a*b+/-c*d
Tue, Mar 17, 9:04 PM
steven.zhang closed D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Tue, Mar 17, 9:04 PM · Restricted Project
steven.zhang committed rGb83490bdb715: [PowerPC] Fix a typo of the condition of checking the fusion candidate (authored by steven.zhang).
[PowerPC] Fix a typo of the condition of checking the fusion candidate
Tue, Mar 17, 3:44 AM
steven.zhang added inline comments to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.
Tue, Mar 17, 12:52 AM · Restricted Project
steven.zhang updated the diff for D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

Address comments.

Tue, Mar 17, 12:52 AM · Restricted Project

Mon, Mar 16

steven.zhang committed rG0b126eec6d46: [NFC][PowerPC] Simplify the logic in lower select_cc (authored by steven.zhang).
[NFC][PowerPC] Simplify the logic in lower select_cc
Mon, Mar 16, 9:18 PM
steven.zhang closed D75834: [NFC][PowerPC] Simplify the logic in lower select_cc.
Mon, Mar 16, 9:18 PM · Restricted Project, Restricted Project
steven.zhang added a comment to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

@lebedev.ri Would you please accept this revision if didn't have comments as you request change for it. Thank you!

Mon, Mar 16, 8:12 PM · Restricted Project
steven.zhang added inline comments to D76042: [PowerPC] Add the Uses of implicit register for the BCLRn instruction.
Mon, Mar 16, 12:49 AM · Restricted Project

Sun, Mar 15

steven.zhang updated the diff for D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

Rebase the patch.

Sun, Mar 15, 7:52 PM · Restricted Project
steven.zhang committed rGf84beee9b8a0: [NFC][Test] Add three tests to verify the behavior of a*b-c*d if there is multi… (authored by steven.zhang).
[NFC][Test] Add three tests to verify the behavior of a*b-c*d if there is multi…
Sun, Mar 15, 7:21 PM
steven.zhang added a comment to D72031: [Scheduling] Create the missing dependency edges for store cluster.

Gentle ping

Sun, Mar 15, 7:20 PM · Restricted Project
steven.zhang added a comment to D70066: [MacroFusion] Limit the max fused number as 2 to reduce the dependency.

I realized that I had a small un-submitted comment here.....Please also update the documentation for shouldScheduleAdjacent to clarify that it won't be called if DepMI is already part of a pair.

Sun, Mar 15, 7:20 PM · Restricted Project
steven.zhang added inline comments to D76042: [PowerPC] Add the Uses of implicit register for the BCLRn instruction.
Sun, Mar 15, 6:15 PM · Restricted Project

Fri, Mar 13

steven.zhang planned changes to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

oops, we indeed could simplify the logic here.

Fri, Mar 13, 2:58 AM · Restricted Project
steven.zhang added inline comments to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.
Fri, Mar 13, 1:33 AM · Restricted Project
steven.zhang committed rGd0fb34dc0967: [PowerPC] Replace the PPCISD:: SExtVElems with ISD::SIGN_EXTEND_INREG to… (authored by steven.zhang).
[PowerPC] Replace the PPCISD:: SExtVElems with ISD::SIGN_EXTEND_INREG to…
Fri, Mar 13, 12:51 AM
steven.zhang closed D70771: [PowerPC] Replace the PPCISD:: SExtVElems with ISD::SIGN_EXTEND_INREG to leverage the combine rules .
Fri, Mar 13, 12:50 AM · Restricted Project, Restricted Project

Thu, Mar 12

steven.zhang updated the diff for D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

Rebase the patch and add tests.

Thu, Mar 12, 10:36 PM · Restricted Project
steven.zhang added inline comments to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Thu, Mar 12, 9:54 PM · Restricted Project
steven.zhang added a comment to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

ping

Thu, Mar 12, 8:29 PM · Restricted Project
steven.zhang committed rGe601196833b5: [NFC][DAGCombine] Move the fold of a*b-c and a-b*c into lambda function (authored by steven.zhang).
[NFC][DAGCombine] Move the fold of a*b-c and a-b*c into lambda function
Thu, Mar 12, 7:47 PM
steven.zhang added inline comments to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Thu, Mar 12, 8:40 AM · Restricted Project
steven.zhang updated the diff for D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

Remove the Aggressive check.

Thu, Mar 12, 3:46 AM · Restricted Project
steven.zhang added inline comments to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Thu, Mar 12, 3:46 AM · Restricted Project
steven.zhang added inline comments to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Thu, Mar 12, 3:46 AM · Restricted Project
steven.zhang added inline comments to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Thu, Mar 12, 2:19 AM · Restricted Project

Wed, Mar 11

steven.zhang committed rG518292dbdfce: [PowerPC] Add the MacroFusion support for Power8 (authored by steven.zhang).
[PowerPC] Add the MacroFusion support for Power8
Wed, Mar 11, 10:34 PM
steven.zhang closed D70651: [Power8] Add the MacroFusion support for Power8 .
Wed, Mar 11, 10:34 PM · Restricted Project
steven.zhang updated the diff for D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

Remove the hook.

Wed, Mar 11, 8:30 PM · Restricted Project
steven.zhang added a comment to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

I don't think this is the right way to solve the problem. From what I can tell, there is no guarantee that this target hook will always work the way you want. What if the source code got reassociated in IR, so that the operands you're expecting as A/B/C/D are swapped?

If the math libs require that some FMA operation is performed to maintain precision, then they should be written using fma() or equivalent in whatever source language the library is written in:
https://en.cppreference.com/w/cpp/numeric/math/fma

Once we are in LLVM IR, that calculation should be maintained using:
http://llvm.org/docs/LangRef.html#int-fma

See also:
http://llvm.org/docs/LangRef.html#llvm-fmuladd-intrinsic

That said, I'm still not sure if this is all going to work as expected yet. Given the 'fast' flag, the compiler has the ability to do just about anything with FP calculations. But my guess is that we'll be ok in IR and codegen by using the fma intrinsic.

Wed, Mar 11, 8:21 PM · Restricted Project
steven.zhang planned changes to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Wed, Mar 11, 6:54 PM · Restricted Project
steven.zhang updated the diff for D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

NFC update the code to make it easier to follow.

Wed, Mar 11, 7:58 AM · Restricted Project
steven.zhang added a comment to D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.

If their uses are the same, add a target hook to allow some platform such as PowerPC to make the choice, as it has different precisions between these two folding which is caused by round a*b or c*d.
In PowerPC, we have some floating precision quite sensitive libraries that depend on the slightly difference between rounding a*b or c*d. So, we need some way to control the behavior of this combine.

To me that sounds like strict floating point semantics should be used there?

Wed, Mar 11, 7:24 AM · Restricted Project
steven.zhang created D75982: [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d.
Wed, Mar 11, 4:33 AM · Restricted Project
steven.zhang committed rG9304decdeeb8: [NFC][Test] Add a PowerPC test to verify the behavior of a*b +/- c*d (authored by steven.zhang).
[NFC][Test] Add a PowerPC test to verify the behavior of a*b +/- c*d
Wed, Mar 11, 3:04 AM
steven.zhang committed rG5edf900da0db: [NFC][Test] Format the test PowerPC/recipest.ll with update_llc_test_checks.py (authored by steven.zhang).
[NFC][Test] Format the test PowerPC/recipest.ll with update_llc_test_checks.py
Wed, Mar 11, 2:20 AM

Tue, Mar 10

steven.zhang created D75895: [PowerPC] Select the select_cc for f64/f32 as set_cc + vselect if VSX enabled.
Tue, Mar 10, 1:36 AM · Restricted Project

Mon, Mar 9

steven.zhang updated the diff for D75834: [NFC][PowerPC] Simplify the logic in lower select_cc.

Update the comments.

Mon, Mar 9, 9:55 PM · Restricted Project, Restricted Project
steven.zhang added a comment to D75821: [PowerPC] Remove the repeated definition for some InstAlias for mtspr/mfspr.

This is a curious situation. How did we end up having multiple definitions of instruction aliases?

Mon, Mar 9, 6:54 PM · Restricted Project

Mar 8 2020

steven.zhang created D75834: [NFC][PowerPC] Simplify the logic in lower select_cc.
Mar 8 2020, 8:14 PM · Restricted Project, Restricted Project

Mar 5 2020

steven.zhang added a comment to D71831: [PowerPC] Exploit the rldicl + rldicl when and with mask.

ping

Mar 5 2020, 6:03 PM · Restricted Project
steven.zhang accepted D63916: [PowerPC] Add exception constraint to FP arithmetic.

LGTM for the ppc side. But please hold on for a couple of days in case someone has other comments.

Mar 5 2020, 1:41 AM · Restricted Project

Mar 4 2020

steven.zhang added inline comments to D75344: [PowerPC] Exploit VSX neg, abs and nabs instruction for f32.
Mar 4 2020, 10:58 PM · Restricted Project
steven.zhang committed rG3906ae387f07: [DAGCombine] Check the uses of negated floating constant and remove the hack (authored by steven.zhang).
[DAGCombine] Check the uses of negated floating constant and remove the hack
Mar 4 2020, 8:08 PM
steven.zhang closed D75501: [DAGCombine] Check the uses of negated floating constant and remove the hack.
Mar 4 2020, 8:07 PM · Restricted Project

Mar 3 2020

steven.zhang updated the diff for D75501: [DAGCombine] Check the uses of negated floating constant and remove the hack.

Fix the logic bug ...

Mar 3 2020, 7:37 PM · Restricted Project
steven.zhang added inline comments to D75501: [DAGCombine] Check the uses of negated floating constant and remove the hack.
Mar 3 2020, 6:30 PM · Restricted Project
steven.zhang updated the diff for D75501: [DAGCombine] Check the uses of negated floating constant and remove the hack.

Update the patch to make it more clear and fix an issue of counting the uses.

Mar 3 2020, 5:52 PM · Restricted Project
steven.zhang updated the diff for D75501: [DAGCombine] Check the uses of negated floating constant and remove the hack.
Mar 3 2020, 3:04 AM · Restricted Project

Mar 2 2020

steven.zhang created D75501: [DAGCombine] Check the uses of negated floating constant and remove the hack.
Mar 2 2020, 11:36 PM · Restricted Project

Feb 26 2020

steven.zhang abandoned D75157: [DAGCombine] Perform the fold of A - (-B) -> A + B only when it is cheaper .

Seems that we indeed see some regression and 'add' has some benefit on the register pressure over sub as it is commutable. I will abandon this revision, Thank you for all the comments.

Feb 26 2020, 5:39 PM · Restricted Project
steven.zhang added a comment to D75157: [DAGCombine] Perform the fold of A - (-B) -> A + B only when it is cheaper .

The test changes don't immediately stand out to me as improvements.
I'd think the fix should go in other direction.

Feb 26 2020, 2:34 AM · Restricted Project
steven.zhang updated the summary of D75157: [DAGCombine] Perform the fold of A - (-B) -> A + B only when it is cheaper .
Feb 26 2020, 12:06 AM · Restricted Project