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Fri, Jul 23

khchen updated the diff for D105555: [RISCV][Clang] Compute the default target-abi if it's empty..

address @jrtc27's comment, thanks! I forget RISCVISAInfo include XLen..

Fri, Jul 23, 9:55 AM · Restricted Project, Restricted Project
khchen added inline comments to D106347: [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-features'..
Fri, Jul 23, 9:27 AM · Restricted Project, Restricted Project
khchen retitled D105555: [RISCV][Clang] Compute the default target-abi if it's empty. from [PoC][RISCV][Clang] Compute the default target-abi if it's empty. to [RISCV][Clang] Compute the default target-abi if it's empty..
Fri, Jul 23, 8:07 AM · Restricted Project, Restricted Project
khchen added a comment to D105555: [RISCV][Clang] Compute the default target-abi if it's empty..
Fri, Jul 23, 8:07 AM · Restricted Project, Restricted Project
khchen updated the diff for D105555: [RISCV][Clang] Compute the default target-abi if it's empty..

address arichardson's comment, thanks!

Fri, Jul 23, 8:06 AM · Restricted Project, Restricted Project

Thu, Jul 22

khchen retitled D106347: [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-features'. from [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-bits'. to [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-features'..
Thu, Jul 22, 1:03 AM · Restricted Project, Restricted Project
khchen updated the diff for D106347: [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-features'..

store target-features string as module flag.

Thu, Jul 22, 1:01 AM · Restricted Project, Restricted Project

Tue, Jul 20

khchen added a comment to D106347: [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-features'..

Why can't we just save target-features itself as a module flag instead of inventing yet another equivalent encoding? Especially since a long bitfield is brittle, you can't reorder or remove elements without breaking bitcode compatibility.

Tue, Jul 20, 8:48 AM · Restricted Project, Restricted Project
khchen requested review of D106347: [PoC][RISCV] Encode arch information in a new module flag meatadata 'riscv-isa-features'..
Tue, Jul 20, 12:43 AM · Restricted Project, Restricted Project

Sun, Jul 18

khchen updated the diff for D105555: [RISCV][Clang] Compute the default target-abi if it's empty..

rebase on D105168.

Sun, Jul 18, 10:53 PM · Restricted Project, Restricted Project
khchen added a comment to D105168: [RISCV] Unify the arch string parsing logic to RISCVISAInfo..

This all looks good to me except some tidy warning.
wait for others comments.

Sun, Jul 18, 9:12 PM · Restricted Project, Restricted Project
khchen added a comment to D106025: [RISCV] Use unordered indexed loads for MGATHER..

I think the difference between of order and unordered load is when the exception happens on memory access,
and the document said "However, using this intrinsic prevents exceptions on memory access to masked-off lanes."
IMO, it makes sense to me to assume mgather is unordered access, because intrinsic users have to set masked-off to avoid exception.

Sun, Jul 18, 7:31 PM · Restricted Project

Thu, Jul 15

khchen added inline comments to D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change.
Thu, Jul 15, 9:44 PM · Restricted Project, Restricted Project
khchen added inline comments to D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change.
Thu, Jul 15, 6:48 PM · Restricted Project, Restricted Project

Tue, Jul 13

khchen committed rG08cf69c31f84: [RISCV] Support overloading for RVV miscellaneous functions. (authored by khchen).
[RISCV] Support overloading for RVV miscellaneous functions.
Tue, Jul 13, 9:36 PM
khchen closed D105611: [RISCV] Support overloading for RVV miscellaneous functions..
Tue, Jul 13, 9:35 PM · Restricted Project
khchen updated the diff for D105611: [RISCV] Support overloading for RVV miscellaneous functions..

rebase

Tue, Jul 13, 9:00 PM · Restricted Project

Mon, Jul 12

khchen added inline comments to D105168: [RISCV] Unify the arch string parsing logic to RISCVISAInfo..
Mon, Jul 12, 9:59 PM · Restricted Project, Restricted Project
khchen added inline comments to D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics..
Mon, Jul 12, 7:07 PM · Restricted Project

Thu, Jul 8

khchen updated the diff for D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..

rebase on D102582
report a error if target-abi module flag is is empty.

Thu, Jul 8, 11:12 PM · Restricted Project, Restricted Project
khchen added inline comments to D105168: [RISCV] Unify the arch string parsing logic to RISCVISAInfo..
Thu, Jul 8, 7:59 AM · Restricted Project, Restricted Project
khchen requested review of D105611: [RISCV] Support overloading for RVV miscellaneous functions..
Thu, Jul 8, 12:11 AM · Restricted Project
khchen updated the diff for D105555: [RISCV][Clang] Compute the default target-abi if it's empty..

address jrtc27's comment.

Thu, Jul 8, 12:01 AM · Restricted Project, Restricted Project

Wed, Jul 7

khchen requested review of D105555: [RISCV][Clang] Compute the default target-abi if it's empty..
Wed, Jul 7, 8:17 AM · Restricted Project, Restricted Project

Mon, Jul 5

khchen added inline comments to D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..
Mon, Jul 5, 12:03 AM · Restricted Project, Restricted Project

Sun, Jul 4

khchen updated the diff for D71387: pass -mabi to LTO linker only in RISC-V targets, enable RISC-V LTO.

Update test cases.

Sun, Jul 4, 8:40 PM · Restricted Project
khchen added a comment to D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..

ping

Sun, Jul 4, 8:07 PM · Restricted Project, Restricted Project

Thu, Jul 1

khchen abandoned D72246: [PoC][RISCV][LTO] Pass target-abi via module flag metadata (solution 2 ).
Thu, Jul 1, 8:16 AM · Restricted Project

Tue, Jun 29

khchen added inline comments to D105092: [PoC][RISCV] Add the tail policy argument to builtins/intrinsics..
Tue, Jun 29, 6:59 AM · Restricted Project, Restricted Project

Mon, Jun 28

khchen added a comment to D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics..

This all looks good to me except adding back the asm check.
BTW, do we need to attach the half-precision floating point spec link?

Mon, Jun 28, 6:04 PM · Restricted Project

May 31 2021

khchen updated the diff for D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..

Revert to previous revision Diff 347356 and add empty module flag could be empty in test.

May 31 2021, 7:49 PM · Restricted Project, Restricted Project

May 29 2021

khchen accepted D103351: [RISCV] Remove earlyclobber from vnsrl/vnsra/vnclip(u) when the source and dest are a single vector register..

Good catch! LGTM.

May 29 2021, 7:35 AM · Restricted Project

May 27 2021

khchen added inline comments to D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..
May 27 2021, 5:38 AM · Restricted Project, Restricted Project
khchen added inline comments to D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..
May 27 2021, 12:08 AM · Restricted Project, Restricted Project
khchen updated the diff for D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..

address @luismarques's comments.

May 27 2021, 12:08 AM · Restricted Project, Restricted Project

May 24 2021

khchen updated the diff for D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..
  1. Handle an empty module flag.

So sorry I forgot to run the clang regresion tests before.

  1. Add empty module flag test and combine all tests into one. It is simiar to compress.ll
May 24 2021, 5:32 AM · Restricted Project, Restricted Project
khchen added a reviewer for D102925: [RISCV] Add wrong arch attribute objfile test.: simoncook.
May 24 2021, 12:57 AM · Restricted Project
khchen added a comment to D102926: [RISCV] Fix wrong objfile attribute bug..

I think this patch is similar to D73339 but it fixes obj file attribute, it is not going to fix different target feature in one complication unit problem.

May 24 2021, 12:55 AM · Restricted Project

May 23 2021

khchen added a comment to D102925: [RISCV] Add wrong arch attribute objfile test..

clang or clang+llc your test with my patch the arch attribute is still rv64i2p0, does it break your use cases?

May 23 2021, 9:18 PM · Restricted Project
khchen updated the diff for D102926: [RISCV] Fix wrong objfile attribute bug..

Rebase

May 23 2021, 6:22 PM · Restricted Project
khchen updated the diff for D102925: [RISCV] Add wrong arch attribute objfile test..

update test to show asm has F instructions.

May 23 2021, 6:15 PM · Restricted Project

May 22 2021

khchen added a comment to D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..

ping

May 22 2021, 9:05 AM · Restricted Project, Restricted Project
khchen added a comment to D102925: [RISCV] Add wrong arch attribute objfile test..

I got the similar IR during LTO because the clang driver would not pass the -mattr option to lto code generator.

May 22 2021, 9:03 AM · Restricted Project

May 21 2021

khchen requested review of D102926: [RISCV] Fix wrong objfile attribute bug..
May 21 2021, 9:00 AM · Restricted Project
khchen requested review of D102925: [RISCV] Add wrong arch attribute objfile test..
May 21 2021, 9:00 AM · Restricted Project

May 17 2021

khchen updated the diff for D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..

address Craig's comments, thanks!

May 17 2021, 10:38 PM · Restricted Project, Restricted Project
khchen retitled D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag. from [PoC][RISCV] Report an error when ABI mismatch with target-abi module flag. to [RISCV] Report an error when ABI mismatch with target-abi module flag..
May 17 2021, 7:21 AM · Restricted Project, Restricted Project
khchen retitled D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag. from [PoC][RISCV] Report an error when target-abi option is empty but target-abi module flag is not. to [PoC][RISCV] Report an error when ABI mismatch with target-abi module flag..
May 17 2021, 6:09 AM · Restricted Project, Restricted Project
khchen updated the diff for D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..

addres https://reviews.llvm.org/D71387#2762120, compute a default ABI for comparison rather than report an error when missing -mabi

May 17 2021, 6:04 AM · Restricted Project, Restricted Project

May 16 2021

khchen added a comment to D71387: pass -mabi to LTO linker only in RISC-V targets, enable RISC-V LTO.

Okay. Please let me know if you want me to review anything.

Hi all,
We had encoded the target-abi into module now, but I feel it does not make sense to
support overwrite ABI option and datalayout in TargetMahcine/IR by target-abi module flag in IR.

So I think maybe passing the target-abi option by clang driver can make anything more simple, the only one limitation is users need to specific -mabi in below cases at the last command.

clang -target riscv64-unknown-elf a.c -flto -march=rv64gc -mabi=lp64f -o a.o
clang -target riscv64-unknown-elf b.c -flto -march=rv64gc -mabi=lp64f -o b.o
clang -target riscv64-unknown-elf a.o b.o -flto -march=rv64gc -o foo

We should treat a missing -mabi= as an implicit -mabi=whatever-the-default-is for consistency with non-LTO. So yes, if the default ABI differs from what you've compiled the .o's with, you should have to provide it. This is needed already _anyway_ for multilib toolchains to determine the right library search path, though there are cases currently when you can get away without providing it, at least with Clang.

May 16 2021, 7:43 PM · Restricted Project
khchen updated the diff for D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..
  1. address @jrtc27' comment
  2. change report_fatal_error as errs() because report_fatal_error will ask users to submit a bug report, it does not make sense.
  3. combine two error message as one.
May 16 2021, 7:27 PM · Restricted Project, Restricted Project
khchen added a comment to D71387: pass -mabi to LTO linker only in RISC-V targets, enable RISC-V LTO.

Okay. Please let me know if you want me to review anything.

May 16 2021, 10:03 AM · Restricted Project
khchen updated the diff for D71387: pass -mabi to LTO linker only in RISC-V targets, enable RISC-V LTO.

Pass -target-abi option into LTO codegenerator base on D102582 patch.

May 16 2021, 9:50 AM · Restricted Project
khchen requested review of D102582: [RISCV] Report an error when ABI mismatch with target-abi module flag..
May 16 2021, 9:44 AM · Restricted Project, Restricted Project

May 9 2021

khchen accepted D102086: [RISCV] Validate the SEW and LMUL operands to __builtin_rvv_vsetvli(max).

Good catch, LGTM!

May 9 2021, 6:53 PM · Restricted Project
khchen committed rG446ed6394bd3: [RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter. (authored by khchen).
[RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter.
May 9 2021, 6:49 PM
khchen closed D101889: [RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter..
May 9 2021, 6:49 PM · Restricted Project

May 7 2021

khchen accepted D102051: [RISCV] Consider scalar types for required extensions..

Good catch! LGTM!

May 7 2021, 12:53 AM · Restricted Project

May 5 2021

khchen requested review of D101889: [RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter..
May 5 2021, 3:19 AM · Restricted Project

May 3 2021

khchen added a comment to D70401: [WIP][RISCV] Implement ilp32e ABI.

Hi, I would like to add ilp32e ABI support in llvm
Is there anyone working on this?
It seem the one thing missed is ilp32e ABI should disallow D ISA extension.
Is there anything else?

May 3 2021, 2:25 AM · Restricted Project, Restricted Project

May 2 2021

khchen accepted D101700: [RISCV] Reorder masked builtin operands. Use clang_builtin_alias for all overloaded vector builtins..

LGTM. Thanks for improvement!

May 2 2021, 6:04 AM · Restricted Project

Apr 28 2021

khchen added inline comments to D101426: [RISCV] Update subset naming convertion for the latest spec.
Apr 28 2021, 9:00 AM · Restricted Project

Apr 27 2021

khchen accepted D101246: [RISCV] Select 5 bit immediate for VSETIVLI during isel rather than peepholing in the custom inserter..

Thanks for clarification, LGTM.

Apr 27 2021, 12:42 AM · Restricted Project

Apr 26 2021

khchen added a comment to D101246: [RISCV] Select 5 bit immediate for VSETIVLI during isel rather than peepholing in the custom inserter..

Select the immediate during isel does make sense to me, but unfortunately there are some cases have a slower result.
Do you know is there any cases which have better instruction order and reduce register spilling when apply the new scheme?
I'm just afraid of the new one would be always generate the slower instruction order.

Apr 26 2021, 10:12 AM · Restricted Project
khchen accepted D101138: [RISCV] Match splatted load to scalar load + splat. Form strided load during isel..

LGTM.

Apr 26 2021, 9:29 AM · Restricted Project

Apr 25 2021

khchen added a comment to D99741: [RISCV][Clang] Add some RVV Floating-Point intrinsic functions. (vfclass, vfmerge, vfrec7, vfrsqrt7, vfsqrt).

@thakis
https://reviews.llvm.org/D100611 had landed, could you check your bot to see the cycle time?

Apr 25 2021, 9:13 PM · Restricted Project
khchen accepted D100821: [RISCV] Implement the vmmv.m/vmnot.m builtin..

LGTM.

Apr 25 2021, 8:17 PM · Restricted Project
khchen accepted D100824: [RISCV] Implement the vwcvt{u}.x.x.v/vncvt.x.x.w builtin..

LGTM.

Apr 25 2021, 8:16 PM · Restricted Project

Apr 21 2021

khchen added inline comments to D100819: [RISCV] Implement the vneg.v builtin..
Apr 21 2021, 3:03 AM · Restricted Project
khchen committed rGad0fe5db2fa0: [RISCV][MC] Mask load should not have VMConstraint. (authored by khchen).
[RISCV][MC] Mask load should not have VMConstraint.
Apr 21 2021, 12:22 AM
khchen closed D100825: [RISCV][MC] Mask load should not have VMConstraint..
Apr 21 2021, 12:22 AM · Restricted Project

Apr 20 2021

khchen requested review of D100825: [RISCV][MC] Mask load should not have VMConstraint..
Apr 20 2021, 1:27 AM · Restricted Project

Apr 19 2021

khchen added a comment to D100611: [Clang] Add clang attribute `clang_builtin_alias`..

Is it okay to you? @kito-cheng @frasercrmck
This patch could fix https://bugs.llvm.org/show_bug.cgi?id=49962, I hope this could be merged soon.

Apr 19 2021, 11:34 PM · Restricted Project
khchen committed rGd5fa71e9ecc5: [RISCV] Handle PseudoVRELOAD and PseudoVSPILL in getInstSizeInBytes. (authored by khchen).
[RISCV] Handle PseudoVRELOAD and PseudoVSPILL in getInstSizeInBytes.
Apr 19 2021, 10:31 PM
khchen closed D100702: [RISCV] Handle PseudoVRELOAD and PseudoVSPILL in getInstSizeInBytes..
Apr 19 2021, 10:30 PM · Restricted Project

Apr 18 2021

khchen accepted D100448: [RISCV][Clang] Add RVV AMO builtins.

LGTM. Please remove the ASM check in upstream patches.

Apr 18 2021, 9:10 PM · Restricted Project
khchen accepted D100658: [RISCV] Apply clang_builtin_alias to overloaded builtins..

LGTM.

Apr 18 2021, 1:39 AM · Restricted Project
khchen added a comment to D100611: [Clang] Add clang attribute `clang_builtin_alias`..

Look good to me.
BTW, we also need to update the document later.

Apr 18 2021, 1:39 AM · Restricted Project

Apr 17 2021

khchen requested review of D100702: [RISCV] Handle PseudoVRELOAD and PseudoVSPILL in getInstSizeInBytes..
Apr 17 2021, 6:15 AM · Restricted Project
khchen added a comment to D100658: [RISCV] Apply clang_builtin_alias to overloaded builtins..

I think you also need to handle PermuteOperands field?
PermuteOperands performs the order permutation for non-masked and masked intrinsics when the operand order is different to builtins.

Apr 17 2021, 5:53 AM · Restricted Project

Apr 16 2021

khchen committed rG8f683366afcf: [RISCV][Clang] Add RVV miscellaneous intrinsic functions. (authored by khchen).
[RISCV][Clang] Add RVV miscellaneous intrinsic functions.
Apr 16 2021, 9:42 AM
khchen closed D100391: [RISCV][Clang] Add RVV miscellaneous intrinsic functions..
Apr 16 2021, 9:41 AM · Restricted Project
khchen committed rGca9e52f67cb3: [RISCV][Clang] Drop the assembly tests for RVV intrinsics. (authored by khchen).
[RISCV][Clang] Drop the assembly tests for RVV intrinsics.
Apr 16 2021, 9:30 AM
khchen closed D100617: [RISCV][Clang] Drop the assembly tests for RVV intrinsics..
Apr 16 2021, 9:30 AM · Restricted Project
khchen added inline comments to D100391: [RISCV][Clang] Add RVV miscellaneous intrinsic functions..
Apr 16 2021, 7:34 AM · Restricted Project
khchen updated the diff for D100391: [RISCV][Clang] Add RVV miscellaneous intrinsic functions..

Address the Craig's comments.

Apr 16 2021, 7:34 AM · Restricted Project
khchen added inline comments to D100448: [RISCV][Clang] Add RVV AMO builtins.
Apr 16 2021, 7:31 AM · Restricted Project
khchen added a comment to D99741: [RISCV][Clang] Add some RVV Floating-Point intrinsic functions. (vfclass, vfmerge, vfrec7, vfrsqrt7, vfsqrt).

Was there any more progress on this? If not, let's revert for now to not permanently slow down tests by over 20%.

https://reviews.llvm.org/D100611
https://reviews.llvm.org/D100617

Great, let's wait and see for a few days to see if it lands, and if so how much that recovers then.

Do you mean revert https://github.com/llvm/llvm-project/compare/a3bfddbb6a27...59d5b8c27b43?

Yes.

Apr 16 2021, 5:40 AM · Restricted Project
khchen added a comment to D99741: [RISCV][Clang] Add some RVV Floating-Point intrinsic functions. (vfclass, vfmerge, vfrec7, vfrsqrt7, vfsqrt).

Was there any more progress on this? If not, let's revert for now to not permanently slow down tests by over 20%.

Apr 16 2021, 4:43 AM · Restricted Project

Apr 15 2021

khchen requested review of D100617: [RISCV][Clang] Drop the assembly tests for RVV intrinsics..
Apr 15 2021, 8:18 PM · Restricted Project
khchen added a comment to D100529: [PoC] Reduce impact `riscv_vector.h` when testing.

I think using this proxy header for testing seems good.

Apr 15 2021, 1:24 AM
khchen added a comment to D99741: [RISCV][Clang] Add some RVV Floating-Point intrinsic functions. (vfclass, vfmerge, vfrec7, vfrsqrt7, vfsqrt).

The fact that we're running the optimization pipeline in these tests might be to blame. Might also be that riscv_vector.h is currently about 71000 lines which probably isn't quick to parse.

Apr 15 2021, 12:05 AM · Restricted Project

Apr 14 2021

khchen committed rGea5d33dbc1ec: [RISCV][Clang] Add vmv and vfmv series intrinsic functions. (authored by khchen).
[RISCV][Clang] Add vmv and vfmv series intrinsic functions.
Apr 14 2021, 10:23 PM
khchen closed D100266: [RISCV][Clang] Add vmv and vfmv series intrinsic functions..
Apr 14 2021, 10:23 PM · Restricted Project

Apr 13 2021

khchen requested review of D100391: [RISCV][Clang] Add RVV miscellaneous intrinsic functions..
Apr 13 2021, 8:55 AM · Restricted Project
khchen updated the diff for D100266: [RISCV][Clang] Add vmv and vfmv series intrinsic functions..

Fix Indent.

Apr 13 2021, 8:54 AM · Restricted Project

Apr 12 2021

khchen updated the summary of D100266: [RISCV][Clang] Add vmv and vfmv series intrinsic functions..
Apr 12 2021, 8:16 AM · Restricted Project
khchen added inline comments to D100266: [RISCV][Clang] Add vmv and vfmv series intrinsic functions..
Apr 12 2021, 8:16 AM · Restricted Project
khchen updated the diff for D100266: [RISCV][Clang] Add vmv and vfmv series intrinsic functions..

address Jim's comment.

Apr 12 2021, 8:16 AM · Restricted Project

Apr 11 2021

khchen committed rG59d5b8c27b43: [RISCV][Clang] Add some RVV Permutation intrinsic functions. (authored by khchen).
[RISCV][Clang] Add some RVV Permutation intrinsic functions.
Apr 11 2021, 7:31 PM