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aemerson added inline comments to D63169: [GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks..
Mon, Jun 17, 1:13 PM · Restricted Project

Fri, Jun 14

aemerson accepted D63163: [GlobalISel][AArch64] Fold G_SUB into G_ICMP when it's safe to do so.

LGTM with a further change.

Fri, Jun 14, 4:11 PM · Restricted Project
aemerson added inline comments to D63303: [GlobalISel][Localizer] Rewrite localizer to run in 2 phases, inter & intra block..
Fri, Jun 14, 12:11 PM · Restricted Project
aemerson committed rGf79d3bc72423: [GlobalISel] Add a G_BRJT opcode. (authored by aemerson).
[GlobalISel] Add a G_BRJT opcode.
Fri, Jun 14, 10:55 AM
aemerson committed rL363434: [GlobalISel] Add a G_BRJT opcode..
[GlobalISel] Add a G_BRJT opcode.
Fri, Jun 14, 10:52 AM
aemerson closed D63159: [GlobalISel] Add a G_BRJT opcode.
Fri, Jun 14, 10:52 AM · Restricted Project

Thu, Jun 13

aemerson updated the diff for D63159: [GlobalISel] Add a G_BRJT opcode.

Use ptype0.

Thu, Jun 13, 4:18 PM · Restricted Project
aemerson added inline comments to D63159: [GlobalISel] Add a G_BRJT opcode.
Thu, Jun 13, 4:13 PM · Restricted Project
aemerson accepted D63302: [GISel]: Fix broken matcher for hasOneUse.
Thu, Jun 13, 3:59 PM · Restricted Project
aemerson created D63303: [GlobalISel][Localizer] Rewrite localizer to run in 2 phases, inter & intra block..
Thu, Jun 13, 3:46 PM · Restricted Project
aemerson committed rGfb0a40f0648d: [GlobalISel][IRTranslator] Add debug loc with line 0 to constants emitted into… (authored by aemerson).
[GlobalISel][IRTranslator] Add debug loc with line 0 to constants emitted into…
Thu, Jun 13, 3:15 PM
aemerson committed rL363331: [GlobalISel][IRTranslator] Add debug loc with line 0 to constants emitted into….
[GlobalISel][IRTranslator] Add debug loc with line 0 to constants emitted into…
Thu, Jun 13, 3:12 PM
aemerson closed D63286: [GlobalISel][IRTranslator] Don't add debug info to constants emitted into the entry block.
Thu, Jun 13, 3:12 PM · debug-info, Restricted Project
aemerson updated the diff for D63286: [GlobalISel][IRTranslator] Don't add debug info to constants emitted into the entry block.

Use a debug loc with line 0 instead, fix a test that should have been using fastisel.

Thu, Jun 13, 1:03 PM · debug-info, Restricted Project
aemerson added inline comments to D63286: [GlobalISel][IRTranslator] Don't add debug info to constants emitted into the entry block.
Thu, Jun 13, 11:18 AM · debug-info, Restricted Project
aemerson added a reviewer for D63286: [GlobalISel][IRTranslator] Don't add debug info to constants emitted into the entry block: dsanders.
Thu, Jun 13, 10:36 AM · debug-info, Restricted Project
aemerson accepted D63235: GlobalISel: Remove redundant pass initialization.

LGTM.

Thu, Jun 13, 10:33 AM · Restricted Project
aemerson created D63286: [GlobalISel][IRTranslator] Don't add debug info to constants emitted into the entry block.
Thu, Jun 13, 10:33 AM · debug-info, Restricted Project

Wed, Jun 12

aemerson added a child revision for D63169: [GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks.: D63223: [AArch64][GlobalISel] Implement selection support for the new G_JUMP_TABLE and G_BRJT ops.
Wed, Jun 12, 10:51 AM · Restricted Project
aemerson added a parent revision for D63223: [AArch64][GlobalISel] Implement selection support for the new G_JUMP_TABLE and G_BRJT ops: D63169: [GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks..
Wed, Jun 12, 10:51 AM · Restricted Project
aemerson created D63223: [AArch64][GlobalISel] Implement selection support for the new G_JUMP_TABLE and G_BRJT ops.
Wed, Jun 12, 10:51 AM · Restricted Project

Tue, Jun 11

aemerson added a parent revision for D63169: [GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks.: D63159: [GlobalISel] Add a G_BRJT opcode.
Tue, Jun 11, 2:41 PM · Restricted Project
aemerson created D63169: [GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks..
Tue, Jun 11, 2:41 PM · Restricted Project
aemerson added a child revision for D63159: [GlobalISel] Add a G_BRJT opcode: D63169: [GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks..
Tue, Jun 11, 2:41 PM · Restricted Project
aemerson added inline comments to D63163: [GlobalISel][AArch64] Fold G_SUB into G_ICMP when it's safe to do so.
Tue, Jun 11, 2:12 PM · Restricted Project
aemerson committed rGd133c1592560: [GlobalISel] Add a G_JUMP_TABLE opcode. (authored by aemerson).
[GlobalISel] Add a G_JUMP_TABLE opcode.
Tue, Jun 11, 12:56 PM
aemerson committed rL363096: [GlobalISel] Add a G_JUMP_TABLE opcode..
[GlobalISel] Add a G_JUMP_TABLE opcode.
Tue, Jun 11, 12:56 PM
aemerson closed D63111: [GlobalISel] Add a G_JUMP_TABLE opcode.
Tue, Jun 11, 12:56 PM · Restricted Project
aemerson created D63159: [GlobalISel] Add a G_BRJT opcode.
Tue, Jun 11, 12:53 PM · Restricted Project

Mon, Jun 10

aemerson created D63111: [GlobalISel] Add a G_JUMP_TABLE opcode.
Mon, Jun 10, 5:37 PM · Restricted Project

Sun, Jun 9

aemerson added a comment to D63036: LLVM IR constant expressions never trap..

Looks much better, the GISel changes are fine.

Sun, Jun 9, 12:54 AM · Restricted Project
aemerson committed rG0d20969deaf9: [AArch64][GlobalISel] Select immediate forms of cmp instructions. (authored by aemerson).
[AArch64][GlobalISel] Select immediate forms of cmp instructions.
Sun, Jun 9, 12:31 AM
aemerson committed rL362896: [AArch64][GlobalISel] Select immediate forms of cmp instructions..
[AArch64][GlobalISel] Select immediate forms of cmp instructions.
Sun, Jun 9, 12:28 AM

Fri, Jun 7

aemerson committed rG829037a9141d: Factor out SelectionDAG's switch analysis and lowering into a separate… (authored by aemerson).
Factor out SelectionDAG's switch analysis and lowering into a separate…
Fri, Jun 7, 5:06 PM
aemerson committed rL362857: Factor out SelectionDAG's switch analysis and lowering into a separate….
Factor out SelectionDAG's switch analysis and lowering into a separate…
Fri, Jun 7, 5:06 PM
aemerson closed D62745: Factor out SelectionDAG's switch analysis and lowering into a separate component.
Fri, Jun 7, 5:06 PM · Restricted Project

Thu, Jun 6

aemerson committed rGd3144a4abc8b: [AArch64][GlobalISel] Add manual selection support for G_ZEXTLOADs to s64. (authored by aemerson).
[AArch64][GlobalISel] Add manual selection support for G_ZEXTLOADs to s64.
Thu, Jun 6, 12:58 AM
aemerson committed rL362681: [AArch64][GlobalISel] Add manual selection support for G_ZEXTLOADs to s64..
[AArch64][GlobalISel] Add manual selection support for G_ZEXTLOADs to s64.
Thu, Jun 6, 12:58 AM
aemerson committed rGd940e20051ba: [AArch64][GlobalISel] Add the new changes to fix PR42129 that were supposed to… (authored by aemerson).
[AArch64][GlobalISel] Add the new changes to fix PR42129 that were supposed to…
Thu, Jun 6, 12:32 AM
aemerson committed rL362677: [AArch64][GlobalISel] Add the new changes to fix PR42129 that were supposed to….
[AArch64][GlobalISel] Add the new changes to fix PR42129 that were supposed to…
Thu, Jun 6, 12:32 AM

Wed, Jun 5

aemerson committed rGc37ff0d138af: Revert "Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when… (authored by aemerson).
Revert "Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when…
Wed, Jun 5, 4:45 PM
aemerson committed rL362666: Revert "Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when….
Revert "Revert "[AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when…
Wed, Jun 5, 4:45 PM
aemerson added a comment to D62695: [AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when G_SELECT is fp.

Re-applied in r362666 with a fix. Thanks for reporting it.

Wed, Jun 5, 4:45 PM · Restricted Project
aemerson added a comment to D62695: [AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when G_SELECT is fp.

This seems to have introduced PR42129.

This is causing all our builders to fail with ICE so I'm going to revert this change.

Wed, Jun 5, 1:55 PM · Restricted Project
aemerson added a comment to D62745: Factor out SelectionDAG's switch analysis and lowering into a separate component.

Hi Amara,

LGTM.

The only comment I have is regarding the new namespace switchop: should we have one, should we have something camel case?
I don't feel strongly about it, just that it feels unusual compared to no namespace or existing camel cases ones ISD, RegAlloc, etc. We have non-camel case ones too, thus up to you.

Cheers,
-Quentin

Wed, Jun 5, 1:43 PM · Restricted Project

Tue, Jun 4

aemerson committed rG5e312be0fa84: [AArch64] FastISel: fix test to specify -fast-isel when -fast-isel-abort=1 is… (authored by aemerson).
[AArch64] FastISel: fix test to specify -fast-isel when -fast-isel-abort=1 is…
Tue, Jun 4, 4:11 PM
aemerson committed rL362559: [AArch64] FastISel: fix test to specify -fast-isel when -fast-isel-abort=1 is….
[AArch64] FastISel: fix test to specify -fast-isel when -fast-isel-abort=1 is…
Tue, Jun 4, 4:11 PM
aemerson committed rG2d37cb82f0e6: [AArch64][GlobalISel] Make extloads to i64 legal. (authored by aemerson).
[AArch64][GlobalISel] Make extloads to i64 legal.
Tue, Jun 4, 2:50 PM
aemerson committed rL362553: [AArch64][GlobalISel] Make extloads to i64 legal..
[AArch64][GlobalISel] Make extloads to i64 legal.
Tue, Jun 4, 2:50 PM

Fri, May 31

aemerson accepted D62695: [AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when G_SELECT is fp.

LGTM.

Fri, May 31, 12:41 PM · Restricted Project
aemerson created D62745: Factor out SelectionDAG's switch analysis and lowering into a separate component.
Fri, May 31, 12:03 PM · Restricted Project

Thu, May 30

aemerson added inline comments to D62695: [AArch64][GlobalISel] Optimize G_FCMP + G_SELECT pairs when G_SELECT is fp.
Thu, May 30, 3:08 PM · Restricted Project

Tue, May 28

aemerson accepted D62539: [AArch64][GlobalISel] Select FCMPSri/FCMPDri when comparing against 0.0.

LGTM. Can make a small change to make things a bit more concise but not very important.

Tue, May 28, 1:49 PM · Restricted Project

Fri, May 24

aemerson accepted D62426: [GlobalISel][AArch64] Make FP constraint checks consider possible use/def register banks.
Fri, May 24, 4:01 PM · Restricted Project
aemerson accepted D62421: [GlobalISel][AArch64] NFC: Factor out HasFPConstraints into a proper function.

LGTM

Fri, May 24, 3:00 PM · Restricted Project
aemerson accepted D62267: [GlobalISel][AArch64] Improve register bank mappings for G_SELECT.

LGTM.

Fri, May 24, 11:01 AM · Restricted Project

Thu, May 23

aemerson accepted D62248: GlobalISel: support swifterror on AArch64.

LGTM with test nit.

Thu, May 23, 9:37 AM · Restricted Project
aemerson accepted D62247: CodeGen: refactor swifterror tracking into CodeGen.

LGTM, thanks!

Thu, May 23, 9:15 AM · Restricted Project

Mon, May 20

aemerson added a comment to D61726: [Pass Pipeline] Run another round of reassociation after loop pipeline.

Can you post the actual performance results? It's hard to judge whether 0.3% cost across the entire compiler is acceptable without knowing the benefits.

Mon, May 20, 12:12 PM · Restricted Project

May 17 2019

aemerson accepted D62023: GlobalISel: Implement lower for S64->S32 [SU]ITOFP.
May 17 2019, 3:47 PM
aemerson accepted D60260: Match types of accumulator and result for llvm.experimental.vector.reduce.fadd/fmul.

LGTM.

May 17 2019, 9:05 AM · Restricted Project

May 16 2019

aemerson accepted D61692: [SDAG] Vector op legalization for overflow ops.

LGTM if no one else has comments.

May 16 2019, 9:56 AM · Restricted Project

May 13 2019

aemerson added a comment to D42512: [X86] When using Win64 ABI, exit with error if SSE is disabled for varargs.

This patch is not correct -- the crash is not with varargs functions specifically, llvm also crashes for a function declared to explicitly take a float/double. The Win64 calling convention code assigns values to xmm registers, but it should not when sse is disabled.

Additionally, this patch unnecessarily breaks calling vararg functions with _integer_ arguments, which in particular, the EDK2 project does, with windows ABI functions and sse disabled. So, since this breaks existing working code, I'm going to revert this change now, and then propose a different change to address the crash.

May 13 2019, 11:03 AM · Restricted Project
aemerson added a comment to rL360444: [LSR] Tweak setup cost depth threshold to 10..

Fair enough, I've reverted this in r360589. The test case seemed cumbersome to reduce and commit just for a threshold change, but I'm not sure what the best approach is here yet beyond a depth limit change.

May 13 2019, 8:37 AM
aemerson committed rGe5248e6b41e0: Revert "[LSR] Tweak setup cost depth threshold to 10." (authored by aemerson).
Revert "[LSR] Tweak setup cost depth threshold to 10."
May 13 2019, 8:35 AM
aemerson committed rL360589: Revert "[LSR] Tweak setup cost depth threshold to 10.".
Revert "[LSR] Tweak setup cost depth threshold to 10."
May 13 2019, 8:35 AM

May 10 2019

aemerson committed rG1e3b78993841: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the… (authored by aemerson).
[Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the…
May 10 2019, 4:25 PM
aemerson committed rC360483: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the….
[Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the…
May 10 2019, 4:25 PM
aemerson committed rL360483: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the….
[Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the…
May 10 2019, 4:25 PM
aemerson closed D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library..
May 10 2019, 4:24 PM · Restricted Project, Restricted Project
aemerson added inline comments to D58320: [Darwin] Introduce a new flag, -fapple-link-rtlib that forces linking of the builtins library..
May 10 2019, 3:50 PM · Restricted Project, Restricted Project
aemerson committed rGb6af291772e7: [LSR] Tweak setup cost depth threshold to 10. (authored by aemerson).
[LSR] Tweak setup cost depth threshold to 10.
May 10 2019, 10:28 AM
aemerson committed rL360444: [LSR] Tweak setup cost depth threshold to 10..
[LSR] Tweak setup cost depth threshold to 10.
May 10 2019, 10:28 AM

May 9 2019

aemerson added a comment to D61289: [globalisel] Add G_SEXT_INREG.

Thanks for the explanations. I think you have some good points. Overall, it still looks to me like we're complicating things for backend writers and introducing a lot of subtle distinctions to keep in mind. It would be useful to hear what other people think about this.

May 9 2019, 3:10 PM · Restricted Project

May 8 2019

aemerson added a comment to D57348: [CodeGen][X86] Don't scalarize vector saturating add/sub.

Hi Nikita,

May 8 2019, 9:38 AM · Restricted Project

May 6 2019

aemerson committed rG3d1128cc9e16: [GlobalISel] Handle <1 x T> vector return types properly. (authored by aemerson).
[GlobalISel] Handle <1 x T> vector return types properly.
May 6 2019, 12:42 PM
aemerson added a comment to D60425: [GlobalISel][AArch64] Allow CallLowering to handle types.

We're seeing a failing assertion when building Skia for AArch64 which seems to have been introduced by this change, see PR41738 for more details.

May 6 2019, 12:42 PM · Restricted Project
aemerson committed rL360068: [GlobalISel] Handle <1 x T> vector return types properly..
[GlobalISel] Handle <1 x T> vector return types properly.
May 6 2019, 12:38 PM

Apr 28 2019

aemerson added a comment to D61124: Fix alignment in AArch64InstructionSelector::emitConstantPoolEntry().

Hi Hans,

Apr 28 2019, 12:54 AM · Restricted Project

Apr 20 2019

aemerson committed rG428665255686: Revert r358800. Breaks Obsequi from the test suite. (authored by aemerson).
Revert r358800. Breaks Obsequi from the test suite.
Apr 20 2019, 2:23 PM
aemerson committed rL358829: Revert r358800. Breaks Obsequi from the test suite..
Revert r358800. Breaks Obsequi from the test suite.
Apr 20 2019, 2:23 PM

Apr 19 2019

aemerson committed rGeac69e93779e: Revert "Revert "[GlobalISel] Add legalization support for non-power-2 loads and… (authored by aemerson).
Revert "Revert "[GlobalISel] Add legalization support for non-power-2 loads and…
Apr 19 2019, 4:53 PM
aemerson committed rL358800: Revert "Revert "[GlobalISel] Add legalization support for non-power-2 loads and….
Revert "Revert "[GlobalISel] Add legalization support for non-power-2 loads and…
Apr 19 2019, 4:53 PM
aemerson accepted D60895: [GlobalISel][AArch64] Legalize + select G_FRINT.
Apr 19 2019, 4:35 PM · Restricted Project
aemerson accepted D60893: [GlobalISel] Add IRTranslator support for G_FRINT.
Apr 19 2019, 2:40 PM · Restricted Project
aemerson accepted D60891: [GlobalISel] Add a G_FRINT opcode.

LGTM.

Apr 19 2019, 2:40 PM · Restricted Project
aemerson committed rG36c5baef49b6: Revert "[GlobalISel] Add legalization support for non-power-2 loads and stores" (authored by aemerson).
Revert "[GlobalISel] Add legalization support for non-power-2 loads and stores"
Apr 19 2019, 10:41 AM
aemerson committed rL358771: Revert "[GlobalISel] Add legalization support for non-power-2 loads and stores".
Revert "[GlobalISel] Add legalization support for non-power-2 loads and stores"
Apr 19 2019, 10:41 AM

Apr 18 2019

aemerson accepted D60877: [GlobalISel][AArch64] Legalize v8s8 loads.
Apr 18 2019, 11:25 AM · Restricted Project
aemerson accepted D60881: [GlobalISel][AArch64] Legalize/select G_(S/Z/ANY)_EXT for v8s8s.
Apr 18 2019, 11:20 AM · Restricted Project

Apr 17 2019

aemerson committed rGd51adf056863: Add a getSizeInBits() accessor to MachineMemOperand. NFC. (authored by aemerson).
Add a getSizeInBits() accessor to MachineMemOperand. NFC.
Apr 17 2019, 3:22 PM
aemerson committed rL358617: Add a getSizeInBits() accessor to MachineMemOperand. NFC..
Add a getSizeInBits() accessor to MachineMemOperand. NFC.
Apr 17 2019, 3:21 PM
aemerson closed D60799: Add a getSizeInBits() accessor to MachineMemOperand. NFC..
Apr 17 2019, 3:21 PM · Restricted Project
aemerson added inline comments to D60799: Add a getSizeInBits() accessor to MachineMemOperand. NFC..
Apr 17 2019, 2:46 PM · Restricted Project
aemerson committed rGdaf6e66ac5d2: [GlobalISel] Add legalization support for non-power-2 loads and stores (authored by aemerson).
[GlobalISel] Add legalization support for non-power-2 loads and stores
Apr 17 2019, 2:29 PM
aemerson committed rL358613: [GlobalISel] Add legalization support for non-power-2 loads and stores.
[GlobalISel] Add legalization support for non-power-2 loads and stores
Apr 17 2019, 2:28 PM
aemerson closed D59971: [GlobalISel] Add legalization support for non-power-2 loads and stores.
Apr 17 2019, 2:28 PM · Restricted Project
aemerson updated the diff for D59971: [GlobalISel] Add legalization support for non-power-2 loads and stores.

Yep, in that case might as well remove the entire helper.

Apr 17 2019, 10:28 AM · Restricted Project

Apr 16 2019

aemerson created D60799: Add a getSizeInBits() accessor to MachineMemOperand. NFC..
Apr 16 2019, 3:17 PM · Restricted Project
aemerson added a comment to D59971: [GlobalISel] Add legalization support for non-power-2 loads and stores.

Reviving this as the overall approach was fine, it seems the alignment of non pow2 types is assumed to be the alignment of the next largest pow-2 type, so we don't need to worry about alignment during the breakdown.

I did however change the legalization method to not use extracts/inserts, but instead use extending loads and truncating stores, so that the artifacts get combined away and it Just Works.

I don't like how we do everything in bits, and then the mem operand forces bytes. Would it cost anything to switch MemOperands to also be in bits?

Apr 16 2019, 3:03 PM · Restricted Project