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Tue, Jan 17

JojoR added inline comments to D141346: [RISCV] Add intrinsics support for RISCV XTHeadVdot Extension.
Tue, Jan 17, 1:09 AM · Restricted Project

Mon, Jan 9

JojoR updated the diff for D141346: [RISCV] Add intrinsics support for RISCV XTHeadVdot Extension.
Mon, Jan 9, 8:21 PM · Restricted Project
JojoR added inline comments to D141346: [RISCV] Add intrinsics support for RISCV XTHeadVdot Extension.
Mon, Jan 9, 8:17 PM · Restricted Project
JojoR updated the diff for D141346: [RISCV] Add intrinsics support for RISCV XTHeadVdot Extension.
Mon, Jan 9, 8:16 PM · Restricted Project
JojoR requested review of D141346: [RISCV] Add intrinsics support for RISCV XTHeadVdot Extension.
Mon, Jan 9, 7:35 PM · Restricted Project
JojoR committed rG7546c96be3c5: [RISCV] Add codegen support for RISCV XTHeadVdot Extension (authored by JojoR).
[RISCV] Add codegen support for RISCV XTHeadVdot Extension
Mon, Jan 9, 6:14 PM · Restricted Project, Restricted Project
JojoR closed D140771: [RISCV] Add codegen support for RISCV XTHeadVdot Extension.
Mon, Jan 9, 6:14 PM · Restricted Project, Restricted Project

Thu, Jan 5

JojoR added a comment to D140771: [RISCV] Add codegen support for RISCV XTHeadVdot Extension.

@craig.topper @kito.cheng @asb @eopXD @jrtc27
Any other suggestions ?

Thu, Jan 5, 11:48 PM · Restricted Project, Restricted Project

Jan 3 2023

JojoR updated the diff for D140771: [RISCV] Add codegen support for RISCV XTHeadVdot Extension.
Jan 3 2023, 12:55 AM · Restricted Project, Restricted Project

Dec 29 2022

JojoR requested review of D140771: [RISCV] Add codegen support for RISCV XTHeadVdot Extension.
Dec 29 2022, 7:38 PM · Restricted Project, Restricted Project

Dec 25 2022

JojoR committed rG54752f3ff6d5: [RISCV] Implement assembler support for XTHeadVdot (authored by JojoR).
[RISCV] Implement assembler support for XTHeadVdot
Dec 25 2022, 7:07 PM · Restricted Project, Restricted Project, Restricted Project

Dec 19 2022

JojoR added inline comments to D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 19 2022, 12:06 AM · Restricted Project, Restricted Project

Dec 18 2022

JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 18 2022, 11:52 PM · Restricted Project, Restricted Project
JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 18 2022, 11:33 PM · Restricted Project, Restricted Project

Dec 13 2022

JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 13 2022, 10:00 PM · Restricted Project, Restricted Project
JojoR added a comment to D139386: [RISCV] Implement assembler support for XTHeadVdot.

I am confused about the failures of CI testing and checked that is AddressSanitizer-Unit of x86,
it looks there is no relation between AddressSanitizer and this patch,
could anyone give me some hints for the failures ? thanks :)

Dec 13 2022, 6:04 PM · Restricted Project, Restricted Project
JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 13 2022, 2:51 AM · Restricted Project, Restricted Project

Dec 12 2022

JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 12 2022, 11:45 PM · Restricted Project, Restricted Project
JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 12 2022, 11:02 PM · Restricted Project, Restricted Project
JojoR added inline comments to D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 12 2022, 7:35 PM · Restricted Project, Restricted Project
JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 12 2022, 7:33 PM · Restricted Project, Restricted Project
JojoR added inline comments to D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 12 2022, 7:10 PM · Restricted Project, Restricted Project
JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 12 2022, 7:07 PM · Restricted Project, Restricted Project

Dec 8 2022

JojoR added a comment to D139386: [RISCV] Implement assembler support for XTHeadVdot.

I have not looked at the change at all (yet), but a couple of high level points.

  1. Please link not to the repository, but a specific version of the PDF. We need to know exactly what version of the specification is being implemented. For instance, I was looking at https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.0/xthead-2022-12-04-2.2.0.pdf. Please update RISCVUsage.rst to contain the same information. This will form the user focused documentation.
  1. Can you clarify whether the extension is based on v1.0 or a prior vector specification revision? From the document, it looks like this might be based on v1.0. Getting an extension based off v1.0 into tree will be much easier than one based on v0.7, so being clear is in your interest here. Ideally, you'd revise the specification document to be explicit here as well.
  1. Please split the patch. The first patch for review should add the MC (assembly) part only.
  1. I very strongly encourage you to attend the riscv sync up call happening on Thursday of this week. This will be a likely topic of discussion.
Dec 8 2022, 5:19 AM · Restricted Project, Restricted Project
JojoR added inline comments to D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 8 2022, 5:14 AM · Restricted Project, Restricted Project
JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 8 2022, 4:25 AM · Restricted Project, Restricted Project
JojoR updated the diff for D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 8 2022, 4:21 AM · Restricted Project, Restricted Project

Dec 5 2022

JojoR updated the summary of D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 5 2022, 6:58 PM · Restricted Project, Restricted Project
JojoR requested review of D139386: [RISCV] Implement assembler support for XTHeadVdot.
Dec 5 2022, 6:37 PM · Restricted Project, Restricted Project

Nov 10 2022

JojoR added a comment to D137694: [RISCV] Add OPCFG format of vector.

@craig.topper Thanks for your help :)

Nov 10 2022, 5:36 PM · Restricted Project, Restricted Project
JojoR added a comment to D137808: [RISCV] Add OPCFG format and use it for vsetvli. NFC.

LGTM also

Nov 10 2022, 5:34 PM · Restricted Project, Restricted Project

Nov 9 2022

JojoR added a comment to D137694: [RISCV] Add OPCFG format of vector.

@craig.topper @kito-cheng Any suggestion ?

Nov 9 2022, 9:24 PM · Restricted Project, Restricted Project
JojoR requested review of D137694: [RISCV] Add OPCFG format of vector.
Nov 9 2022, 12:31 AM · Restricted Project, Restricted Project

Oct 27 2022

JojoR added inline comments to D136415: [LSR] Check if terminating value is safe to expand before transformation.
Oct 27 2022, 12:15 AM · Restricted Project, Restricted Project, Restricted Project

Oct 26 2022

JojoR added inline comments to D136415: [LSR] Check if terminating value is safe to expand before transformation.
Oct 26 2022, 11:57 PM · Restricted Project, Restricted Project, Restricted Project
JojoR added a comment to D136415: [LSR] Check if terminating value is safe to expand before transformation.

@JojoR May you please upload the LLVM IR with -O0 (so nothing is triggered) of what causes the assertion error to hit to here so I can try reduce the a test case out of it?

Oct 26 2022, 11:44 PM · Restricted Project, Restricted Project, Restricted Project

Oct 13 2022

JojoR added a comment to D134893: [LSR][TTI][RISCV] Add isAllowTerminatingConditionFoldingAfterLSR into TTI and enable it for RISC-V.

@eopXD I saw the patch D132443 only support eq/neq condterm, and I want to add gt/lt,
any suggestion for me ? or you have plan to implement that ?

Oct 13 2022, 2:49 AM · Restricted Project, Restricted Project
JojoR added a comment to D134893: [LSR][TTI][RISCV] Add isAllowTerminatingConditionFoldingAfterLSR into TTI and enable it for RISC-V.

I have a question about patch D132443, why do not you put optimization in pass "iv-users" ? I think it belongs to IV analyzation.

because that the pass "iv-users" do analyzation only without any transformation ?

IVUser is an analysis pass, and the LSR pass uses it before doing strength reduction.
This transformation is beneficial after LSR, not before it.

Oct 13 2022, 2:26 AM · Restricted Project, Restricted Project
JojoR added a comment to D134893: [LSR][TTI][RISCV] Add isAllowTerminatingConditionFoldingAfterLSR into TTI and enable it for RISC-V.

I have a question about patch D132443, why do not you put optimization in pass "iv-users" ? I think it belongs to IV analyzation.

Oct 13 2022, 2:09 AM · Restricted Project, Restricted Project

Oct 11 2022

JojoR added a comment to D134893: [LSR][TTI][RISCV] Add isAllowTerminatingConditionFoldingAfterLSR into TTI and enable it for RISC-V.

There is a error report as below if i apply this patch on branch main 8d4ebd1a7c9e1f47a4a610aeb41d1613f822ee20
error: Terminating value is not safe to expand, need to add it to predicate.

Oct 11 2022, 1:53 AM · Restricted Project, Restricted Project

Sep 27 2022

JojoR added a comment to D134282: [CGP] Add generic TargetLowering::shouldAlignPointerArgs() implementation.

@arichardson Hello ?

Sep 27 2022, 12:53 AM · Restricted Project, Restricted Project

Sep 20 2022

JojoR added inline comments to D134282: [CGP] Add generic TargetLowering::shouldAlignPointerArgs() implementation.
Sep 20 2022, 8:24 PM · Restricted Project, Restricted Project
JojoR added a comment to D134168: [RISCV] Make preferred alignment of PointerArgs for MemIntrinsic.

Any other suggestions ?

Sep 20 2022, 12:24 AM · Restricted Project, Restricted Project

Sep 19 2022

JojoR added a comment to D134168: [RISCV] Make preferred alignment of PointerArgs for MemIntrinsic.

The description doesn't clearly describe the effect of the patch. My understanding from reading the user of this function is that the alignment of allocas and global variables used by memcpy are increased in CodeGenPrepare. This results in less memory operations. In the case of 32-bit dhrystone, it looks like we have an explicit call to the memcpy library function. I guess by aligning the pointers we allow the source and dest to both be word_size aligned so we can use the full word copy loop?

In my local testing for riscv64 this didn't seem to affect dhrystone performance.

Sep 19 2022, 8:30 PM · Restricted Project, Restricted Project
JojoR updated the diff for D134168: [RISCV] Make preferred alignment of PointerArgs for MemIntrinsic.
Sep 19 2022, 8:23 PM · Restricted Project, Restricted Project
JojoR added inline comments to D134168: [RISCV] Make preferred alignment of PointerArgs for MemIntrinsic.
Sep 19 2022, 8:11 PM · Restricted Project, Restricted Project
JojoR added a comment to D134168: [RISCV] Make preferred alignment of PointerArgs for MemIntrinsic.

Set default preferred alignment for MemIntrinsic like memcpy according to arch32 or arch64,
it will improve performance.

What are arch32 and arch64?

e.g. dhrystone with "-O2" boosts performance by 50% on arch RV32.

On what implementation? Does this affect actually-useful benchmarks, not just dhrystone? I would assume so, but it'd be more useful to get numbers for meaningful benchmarks rather than ones people should've long since abandoned.

Sep 19 2022, 7:42 PM · Restricted Project, Restricted Project
JojoR updated the diff for D134168: [RISCV] Make preferred alignment of PointerArgs for MemIntrinsic.
Sep 19 2022, 6:47 PM · Restricted Project, Restricted Project
JojoR requested review of D134168: [RISCV] Make preferred alignment of PointerArgs for MemIntrinsic.
Sep 19 2022, 1:11 AM · Restricted Project, Restricted Project

Jun 23 2021

JojoR added a comment to D104822: [RISCV] Add vget/vset intrinsics for inserting and extracting between different lmuls..

Thanks for your commit :)

Jun 23 2021, 6:33 PM · Restricted Project