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Wed, Mar 29

nitinjohnraj committed rG50876630b910: [RISCV] Made v(f)(w)red* pseudoinstructions SEW-aware (authored by nitinjohnraj).
[RISCV] Made v(f)(w)red* pseudoinstructions SEW-aware
Wed, Mar 29, 10:46 AM · Restricted Project, Restricted Project
nitinjohnraj closed D147098: [RISCV] Made v(f)(w)red* pseudoinstructions SEW-aware.
Wed, Mar 29, 10:46 AM · Restricted Project, Restricted Project

Tue, Mar 28

nitinjohnraj updated the summary of D147098: [RISCV] Made v(f)(w)red* pseudoinstructions SEW-aware.
Tue, Mar 28, 5:56 PM · Restricted Project, Restricted Project
nitinjohnraj requested review of D147098: [RISCV] Made v(f)(w)red* pseudoinstructions SEW-aware.
Tue, Mar 28, 5:53 PM · Restricted Project, Restricted Project

Mon, Mar 27

nitinjohnraj added a comment to rG08be5e25376d: [RISCV][NFC] Added possible SEWs associated with a given LMUL.

Associated review: https://reviews.llvm.org/D144925

Mon, Mar 27, 2:55 PM · Restricted Project, Restricted Project
nitinjohnraj added a comment to rG5a0c27d3719e: [RISCV][NFC] Remove SEW suffix from pseudoinstructions.

Associated review: https://reviews.llvm.org/D144925

Mon, Mar 27, 2:54 PM · Restricted Project, Restricted Project
nitinjohnraj added a comment to rG7b39f16fb884: [RISCV] Made fsqrtv pseudoinstruction SEW-aware.

Associated review: https://reviews.llvm.org/D144925

Mon, Mar 27, 2:53 PM · Restricted Project, Restricted Project
nitinjohnraj added a comment to rG3cf7e3518072: [RISCV] Made division pseudoinstructions SEW-aware.

Associated review: https://reviews.llvm.org/D144925

Mon, Mar 27, 2:52 PM · Restricted Project, Restricted Project
nitinjohnraj added a comment to rGa075ac05eb59: [RISCV] Made vcompress pseudoinstruction SEW-aware.

Associated review: https://reviews.llvm.org/D144925

Mon, Mar 27, 2:49 PM · Restricted Project, Restricted Project
nitinjohnraj added a comment to rG5ab9ae12b703: [RISCV] Made vrgather.vv and vrgatherei16 pseudoinstructions SEW-aware.

Also, sorry for not maintaining a 1-1 relation between my commits and review, I'll do that in the future!

Mon, Mar 27, 2:47 PM · Restricted Project, Restricted Project
nitinjohnraj added inline comments to rG5ab9ae12b703: [RISCV] Made vrgather.vv and vrgatherei16 pseudoinstructions SEW-aware.
Mon, Mar 27, 10:03 AM · Restricted Project, Restricted Project

Sat, Mar 25

nitinjohnraj committed rG7da272af89f8: [RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE… (authored by nitinjohnraj).
[RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE…
Sat, Mar 25, 2:47 AM · Restricted Project, Restricted Project
nitinjohnraj closed D146752: [RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE instructions.
Sat, Mar 25, 2:47 AM · Restricted Project, Restricted Project

Fri, Mar 24

nitinjohnraj committed rG7b39f16fb884: [RISCV] Made fsqrtv pseudoinstruction SEW-aware (authored by nitinjohnraj).
[RISCV] Made fsqrtv pseudoinstruction SEW-aware
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj committed rG3cf7e3518072: [RISCV] Made division pseudoinstructions SEW-aware (authored by nitinjohnraj).
[RISCV] Made division pseudoinstructions SEW-aware
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj committed rG5ab9ae12b703: [RISCV] Made vrgather.vv and vrgatherei16 pseudoinstructions SEW-aware (authored by nitinjohnraj).
[RISCV] Made vrgather.vv and vrgatherei16 pseudoinstructions SEW-aware
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj committed rGa075ac05eb59: [RISCV] Made vcompress pseudoinstruction SEW-aware (authored by nitinjohnraj).
[RISCV] Made vcompress pseudoinstruction SEW-aware
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj committed rG5a0c27d3719e: [RISCV][NFC] Remove SEW suffix from pseudoinstructions (authored by nitinjohnraj).
[RISCV][NFC] Remove SEW suffix from pseudoinstructions
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj committed rG08be5e25376d: [RISCV][NFC] Added possible SEWs associated with a given LMUL (authored by nitinjohnraj).
[RISCV][NFC] Added possible SEWs associated with a given LMUL
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj committed rG85e0d48a1618: [RISCV][NFC] Broke ReadVRGatherVV into ReadVRGatherVV_data and… (authored by nitinjohnraj).
[RISCV][NFC] Broke ReadVRGatherVV into ReadVRGatherVV_data and…
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj committed rG51e5846b5645: [RISCV][NFC] Renamed [Read/Write]VGather* -> [Read/Write]VRGatherV* (authored by nitinjohnraj).
[RISCV][NFC] Renamed [Read/Write]VGather* -> [Read/Write]VRGatherV*
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj closed D145406: [RISCV][NFC] Break ReadVRGatherVV into ReadVRGatherVV_data and ReadVRGatherVV_index to separate the reads for VRGatherVV.
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj closed D145402: [RISCV][NFC] Rename [Read/Write]VGather* -> [Read/Write]VRGatherV*.
Fri, Mar 24, 4:41 PM · Restricted Project, Restricted Project
nitinjohnraj added inline comments to D146752: [RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE instructions.
Fri, Mar 24, 11:24 AM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D146752: [RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE instructions.

Fixed so that the policy for vecreduce instructions is ta, ma + some refactoring

Fri, Mar 24, 11:23 AM · Restricted Project, Restricted Project

Thu, Mar 23

nitinjohnraj updated the summary of D146752: [RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE instructions.
Thu, Mar 23, 1:03 PM · Restricted Project, Restricted Project
nitinjohnraj requested review of D146752: [RISCV][RISCVISelLowering] Add tail agnostic policy operand to VECREDUCE instructions.
Thu, Mar 23, 1:01 PM · Restricted Project, Restricted Project

Tue, Mar 21

nitinjohnraj updated the diff for D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.

Attempting to fix the diff

Tue, Mar 21, 10:25 AM · Restricted Project, Restricted Project

Wed, Mar 15

nitinjohnraj added inline comments to D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.
Wed, Mar 15, 10:43 AM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.

Refactoring and removing comments

Wed, Mar 15, 10:40 AM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.

Diff updated to add another commit that was missed last time (Sorry, never used commit ranges with arcanist before.)

Wed, Mar 15, 10:29 AM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.

Created a diff from a commit range this time

Wed, Mar 15, 10:20 AM · Restricted Project, Restricted Project

Tue, Mar 14

nitinjohnraj updated the diff for D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.

Made the SchedReads and SchedWrites sew-aware

Tue, Mar 14, 3:10 PM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D145406: [RISCV][NFC] Break ReadVRGatherVV into ReadVRGatherVV_data and ReadVRGatherVV_index to separate the reads for VRGatherVV.

ReadVRGatherVX -> ReadVRGather_(data|index), ReadVRGatherVI -> ReadVRGatherVI_data

Tue, Mar 14, 12:11 PM · Restricted Project, Restricted Project

Tue, Mar 7

nitinjohnraj added reviewers for D145406: [RISCV][NFC] Break ReadVRGatherVV into ReadVRGatherVV_data and ReadVRGatherVV_index to separate the reads for VRGatherVV: michaelmaitland, craig.topper.
Tue, Mar 7, 2:03 PM · Restricted Project, Restricted Project
nitinjohnraj added reviewers for D145402: [RISCV][NFC] Rename [Read/Write]VGather* -> [Read/Write]VRGatherV*: michaelmaitland, craig.topper.
Tue, Mar 7, 2:02 PM · Restricted Project, Restricted Project

Mon, Mar 6

nitinjohnraj requested review of D145406: [RISCV][NFC] Break ReadVRGatherVV into ReadVRGatherVV_data and ReadVRGatherVV_index to separate the reads for VRGatherVV.
Mon, Mar 6, 11:10 AM · Restricted Project, Restricted Project
nitinjohnraj requested review of D145402: [RISCV][NFC] Rename [Read/Write]VGather* -> [Read/Write]VRGatherV*.
Mon, Mar 6, 10:38 AM · Restricted Project, Restricted Project

Feb 28 2023

nitinjohnraj added a comment to D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.
In D144925#4157772, @frasercrmck wrote:

Just a glancing review but, to me, "expand pseudos" has a more immediate connotation of the many pseudo expansion passes (e.g., RISCVExpandPseudoInsts) than "expanding the set of pseudos" as you seem to intend it.

Feb 28 2023, 2:46 PM · Restricted Project, Restricted Project
nitinjohnraj retitled D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name from [RISCV][NFC] Expand pseudos with sew for instructions that depend on lmul to [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name .
Feb 28 2023, 2:46 PM · Restricted Project, Restricted Project
nitinjohnraj updated the summary of D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.
Feb 28 2023, 10:43 AM · Restricted Project, Restricted Project

Feb 27 2023

nitinjohnraj updated the summary of D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.
Feb 27 2023, 3:42 PM · Restricted Project, Restricted Project
nitinjohnraj added a reviewer for D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name: craig.topper.
Feb 27 2023, 3:36 PM · Restricted Project, Restricted Project
nitinjohnraj retitled D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name from [RISCV][NFC] Added possible SEWs associated with a given LMUL to [RISCV][NFC] Expand pseudos with sew for instructions that depend on lmul.
Feb 27 2023, 3:35 PM · Restricted Project, Restricted Project
nitinjohnraj requested review of D144925: [RISCV][NFC] Replace the pseudos for instructions that depend on lmul with variants that encode the SEW into the name.
Feb 27 2023, 3:26 PM · Restricted Project, Restricted Project

Feb 21 2023

nitinjohnraj added a reviewer for D144531: [RISCV] Replaced !subst chain with !foldl: craig.topper.
Feb 21 2023, 6:44 PM · Restricted Project, Restricted Project
nitinjohnraj requested review of D144531: [RISCV] Replaced !subst chain with !foldl.
Feb 21 2023, 6:43 PM · Restricted Project, Restricted Project

Dec 22 2022

nitinjohnraj updated the diff for D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.

Added the VT_MASKC/N changes

Dec 22 2022, 11:07 AM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.

Pulled from main

Dec 22 2022, 10:58 AM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.

Pulled from main

Dec 22 2022, 9:27 AM · Restricted Project, Restricted Project

Dec 14 2022

nitinjohnraj updated the diff for D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.

Fixed some documentation nits

Dec 14 2022, 3:19 PM · Restricted Project, Restricted Project

Dec 13 2022

nitinjohnraj updated the diff for D139462: [RISCV][CodeGen][SelectionDAG] Recursively check hasAllNBitUsers for logical machine opcodes.

Formatting fixed

Dec 13 2022, 4:25 PM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D139462: [RISCV][CodeGen][SelectionDAG] Recursively check hasAllNBitUsers for logical machine opcodes.

Removed the TODO

Dec 13 2022, 2:43 PM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.

Fixed previous erroneous revision, linked parent revision via commit message

Dec 13 2022, 2:38 PM · Restricted Project, Restricted Project
nitinjohnraj retitled D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility from [RISCV][WIP] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility to [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.
Dec 13 2022, 2:28 PM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D139462: [RISCV][CodeGen][SelectionDAG] Recursively check hasAllNBitUsers for logical machine opcodes.

The patch has been rebased and the test checks have been updated.

Dec 13 2022, 12:37 PM · Restricted Project, Restricted Project
nitinjohnraj added a comment to D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.
In D139948#3992911, @craig.topper wrote:
In D139948#3992908, @jrtc27 wrote:

I don't understand this, your patch subject says you're adding a pass to remove the W suffix from instructions, but the actual diff doesn't add a pass and the test changes all add W suffices

The last update looks like it should have gone to D139462

Dec 13 2022, 12:35 PM · Restricted Project, Restricted Project
nitinjohnraj updated the diff for D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.

Updated the test checks

Dec 13 2022, 12:19 PM · Restricted Project, Restricted Project
nitinjohnraj added a reviewer for D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility: craig.topper.
Dec 13 2022, 8:57 AM · Restricted Project, Restricted Project
nitinjohnraj requested review of D139948: [RISCV] Add pass to remove W suffix from ADDIW and SLLIW to improve compressibility.
Dec 13 2022, 8:54 AM · Restricted Project, Restricted Project

Dec 6 2022

nitinjohnraj updated the summary of D139462: [RISCV][CodeGen][SelectionDAG] Recursively check hasAllNBitUsers for logical machine opcodes.
Dec 6 2022, 2:35 PM · Restricted Project, Restricted Project
nitinjohnraj requested review of D139462: [RISCV][CodeGen][SelectionDAG] Recursively check hasAllNBitUsers for logical machine opcodes.
Dec 6 2022, 2:22 PM · Restricted Project, Restricted Project